公开(公告)号：US20240184482A1

公开(公告)日：2024-06-06

申请号：US18529645

申请日：2023-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chanha KIM ,  Namwook Kang ,  Soojun Im

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: A storage device includes a non-volatile memory and storage controller. The non-volatile memory includes a plurality of physical blocks coupled to each other via a plurality of dies. Each die of the plurality of dies is coupled to a corresponding bank via a corresponding channel. The storage controller is configured to receive, from a plurality of hosts, a plurality of pieces of physical function (PF) data. The storage controller is further configured to measure metrics of the plurality of pieces of PF data and the plurality of dies. The storage controller is further configured to allocate, according to a die allocation policy and based at least on the measured metrics, the plurality of pieces of PF data to one or more dies of the plurality of dies. Each die of the plurality of dies is allocated to a corresponding host of the plurality of hosts.

公开(公告)号：US20250103486A1

公开(公告)日：2025-03-27

申请号：US18770795

申请日：2024-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha KIM ,  Jiyeun KANG ,  Alain TRAN ,  Soojun IM

IPC: G06F12/02

Abstract: A storage device includes a non-volatile memory device including a plurality of memory blocks; and a memory controller configured to control a garbage collection operation of copying valid data of a source block among the plurality of memory blocks to a destination block. The memory controller is configured to read a logical address stored in a page included in the source block, determine a validity of user data stored in the page included in the source block based on the logical address, read the valid data, which includes the user data determined to be valid, from the non-volatile memory device, and perform a write operation on the destination block by transferring the read valid data to the non-volatile memory device.

公开(公告)号：US20230126807A1

公开(公告)日：2023-04-27

申请号：US17853227

申请日：2022-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha KIM ,  Gyeongmin NAM ,  Seungryong JANG

IPC: G06F12/14 ,  G06F12/0882 ,  G06F12/123

Abstract: A storage device includes a memory device including a first memory region having a lowest bit density, a second memory region having a medium bit density, and a third memory region having a highest bit density, and a controller configured to control the memory device. The controller is configured to determine data from a host as being any one of hot data, warm data and cold data, is configured to store the hot data in the first memory region, is configured to store the warm data in the second memory region, is configured to store the cold data in the third memory region, is configured to select a source block of first memory blocks included in the first memory region, is configured to select destination blocks in each of the second and third memory regions, and is configured to migrate each piece of unit data stored in the source block to one of the destination blocks according to a degree of hotness of each piece of the unit data.

公开(公告)号：US20220172794A1

公开(公告)日：2022-06-02

申请号：US17393797

申请日：2021-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangwoo LEE ,  Chanha KIM ,  Heewon LEE

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26

Abstract: In a method of writing data in a nonvolatile memory device, a write command, a write address and write data to be programmed are received. Offset information representing a verification level is received. The offset information is provided when the write data corresponds to a distribution deterioration pattern by checking an input/output (I/O) pattern of the write data. When the offset information is received, the write data is programmed based on the offset information such that at least one state among a plurality of states included in a distribution of threshold voltages of memory cells in which the write data is stored is changed.

公开(公告)号：US20230130233A1

公开(公告)日：2023-04-27

申请号：US17853195

申请日：2022-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeongmin NAM ,  Chanha KIM ,  Seungryong JANG

IPC: G06F12/02 ,  G06F12/06 ,  G06F12/121

Abstract: A method of operating a storage device, including a first memory region having a lowest bit density, a second memory region having a medium bit density, and a third memory region having a highest bit density, includes determining a hotness of a logical address received with a write command and data to be written, from a host, based on the determined hotness being greater than a first hotness threshold, determining whether a wear level of the first memory region is greater than a wear threshold, and increasing the first hotness threshold and storing the data in the second memory region based on the wear level of the first memory region being greater than a threshold.

公开(公告)号：US20230127449A1

公开(公告)日：2023-04-27

申请号：US17741755

申请日：2022-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha KIM ,  Gyeongmin NAM ,  Seungryong JANG

IPC: G06F3/06 ,  G06F12/02

Abstract: A controller includes a central processing unit (CPU) configured to insert a latest received logical address, received together with a write command and data from a host, into a logical address list; a hotness determining circuit configured to assign a maximum weight to the latest received logical address, decrease weights of received logical addresses included in the logical address list by a decay factor, and sum weights of the received logical addresses having values, equal to a value of the latest received logical address, to determine hotness of the latest received logical address; and a parameter adjustment circuit decreasing a magnitude of the decay factor based on the repeatability index of the received logical addresses included in the logical address list, wherein the CPU is configured to control the memory device to store the data in one of the memory regions based on the hotness.