APPRATUS AND METHOD WITH HOMOMORPHIC ENCRYPTION

    公开(公告)号:US20230171084A1

    公开(公告)日:2023-06-01

    申请号:US17961828

    申请日:2022-10-07

    CPC classification number: H04L9/008

    Abstract: An apparatus with homomorphic encryption includes: a first memory configured to receive and store a polynomial; a second memory configured to store a twiddle factor; a number theoretic transform (NTT) module configured to perform an NTT operation on the polynomial based on the twiddle factor; and a controller configured to control the first memory, the second memory, and the NTT module, wherein the NTT module comprises a butterfly unit (BU) array that comprises a plurality of BUs configured to, for the performing of the NTT operation, perform a modular operation on coefficients of the polynomial.

    CACHE CONTROL DEVICE FOR PREFETCHING AND PREFETCHING METHOD USING CACHE CONTROL DEVICE
    2.
    发明申请
    CACHE CONTROL DEVICE FOR PREFETCHING AND PREFETCHING METHOD USING CACHE CONTROL DEVICE 有权
    用于使用高速缓存控制设备的前缀和前缀方法的缓存控制设备

    公开(公告)号:US20160055089A1

    公开(公告)日:2016-02-25

    申请号:US14931019

    申请日:2015-11-03

    Abstract: The present examples relate to prefetching, and to a cache control device for prefetching and a prefetching method using the cache control device, wherein the cache control device analyzes a memory access pattern of program code, inserts, into the program code, a prefetching command generated by encoding the analyzed access pattern, and executes the prefetching command inserted into the program code in order to prefetch data into a cache, thereby maximizing prefetching efficiency.

    Abstract translation: 本示例涉及预取,以及用于预取的高速缓存控制设备和使用高速缓存控制设备的预取方法,其中,高速缓存控制设备分析程序代码的存储器访问模式,将程序代码插入到生成的预取命令中 通过对所分析的访问模式进行编码,并且执行插入到程序代码中的预取命令,以便将数据预取到高速缓存中,从而最大化预取效率。

    APPARATUS AND METHOD FOR TRANSLATING MULTITHREAD PROGRAM CODE
    3.
    发明申请
    APPARATUS AND METHOD FOR TRANSLATING MULTITHREAD PROGRAM CODE 有权
    用于翻译多重程序代码的装置和方法

    公开(公告)号:US20140331216A1

    公开(公告)日:2014-11-06

    申请号:US14268383

    申请日:2014-05-02

    Abstract: A method and apparatus for translating a multithread program code are provided. The method includes: dividing a multithread program code into a plurality of statements according to a synchronization point; generating at least one loop group by combining one or more adjacent statements based on a number of instructions included in the plurality of statements; expanding or renaming variables in each of the plurality of statements so that each statement included in the at least one loop group is executed with respect to a work item of a different work group; and enclosing each of the generated at least one loop group respectively with a work item coalescing loop.

    Abstract translation: 提供了一种用于翻译多线程程序代码的方法和装置。 该方法包括:根据同步点将多线程程序代码划分为多个语句; 通过基于所述多个语句中包括的指令的数目组合一个或多个相邻语句来生成至少一个循环组; 扩展或重命名所述多个语句中的每一个中的变量,使得包括在所述至少一个循环组中的每个语句相对于不同工作组的工作项执行; 并且分别将生成的至少一个循环组中的每一个包围工件项聚合循环。

    METHOD AND DEVICE FOR COMPARING MOVEMENT PATHS BASED ON HOMOMORPHIC ENCRYPTION

    公开(公告)号:US20210409189A1

    公开(公告)日:2021-12-30

    申请号:US17341824

    申请日:2021-06-08

    Abstract: A method and device for comparing movement paths based on homomorphic encrypted is disclosed, where a server includes a processor configured to collect first encrypted movement path information of a comparison target encrypted by a common key, receive, from a user device, second encrypted movement path information of a user of the user device encrypted by a private key, compare the first encrypted movement path information and the second encrypted movement path information, decrypt a portion of a result of the comparison by the common key to generate a partially decrypted comparison result, and provide the partially decrypted result of the comparison to the user.

    HOMOMORPHIC ENCRYPTION APPARATUS AND METHOD
    7.
    发明公开

    公开(公告)号:US20230171085A1

    公开(公告)日:2023-06-01

    申请号:US17994294

    申请日:2022-11-26

    CPC classification number: H04L9/008 H04L9/0618

    Abstract: A homomorphic encryption apparatus and method are disclosed. The homomorphic encryption apparatus includes one or more processors, and memory storing instructions configured to, when executed by the one or more processors, cause the one or more processors to receive a blind rotation key for performing a blind rotation operation and receive an operand ciphertext of the blind rotation operation, generate a first ciphertext by performing addition of a polynomial representation based on the blind rotation key and the operand ciphertext, and generate a target ciphertext by performing key switching and accumulative multiplication based on the first ciphertext.

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