公开(公告)号：US20190181226A1

公开(公告)日：2019-06-13

申请号：US16186915

申请日：2018-11-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hoon CHOI ,  Dongkyum KIM ,  Sunggil KIM ,  Seulye KIM ,  Sangsoo LEE ,  Hyeeun HONG

IPC: H01L29/10 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/423 ,  H01L27/11526 ,  H01L27/11573

Abstract: A three-dimensional semiconductor memory device includes an electrode structure including electrodes vertically stacked on a semiconductor layer, a vertical semiconductor pattern penetrating the electrode structure and connected to the semiconductor layer, and a vertical insulating pattern between the electrode structure and the vertical semiconductor pattern. The vertical insulating pattern includes a sidewall portion on a sidewall of the electrode structure, and a protrusion extending from the sidewall portion along a portion of a top surface of the semiconductor layer. The vertical semiconductor pattern includes a vertical channel portion having a first thickness and extending along the sidewall portion of the vertical insulating pattern, and a contact portion extending from the vertical channel portion and conformally along the protrusion of the vertical insulating pattern and the top surface of the semiconductor layer. The contact portion has a second thickness greater than the first thickness.

公开(公告)号：US20220384482A1

公开(公告)日：2022-12-01

申请号：US17881707

申请日：2022-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Hwan KIM ,  Sunggil KIM ,  Dongkyum KIM ,  Seulye KIM ,  Ji-Hoon CHOI

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  H01L29/792 ,  H01L29/04 ,  H01L29/423 ,  H01L27/11573

Abstract: A three-dimensional semiconductor memory device is disclosed. The device may include a first source conductive pattern comprising a polycrystalline material including first crystal grains on a substrate, the substrate may comprising a polycrystalline material including second crystal grains, a grain size of the first crystal grains being smaller than a grain size of the second crystal grains, a stack including a plurality of gate electrodes, the plurality of gates stacked on the first source conductive pattern, and a vertical channel portion penetrating the stack and the first source conductive pattern, and the vertical channel portion being in contact with a side surface of the first source conductive pattern.

公开(公告)号：US20210043647A1

公开(公告)日：2021-02-11

申请号：US16838586

申请日：2020-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Hwan KIM ,  Sunggil KIM ,  Dongkyum KIM ,  Seulye KIM ,  Ji-Hoon CHOI

IPC: H01L27/11582 ,  H01L29/04 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L29/423 ,  H01L29/792

Abstract: A three-dimensional semiconductor memory device is disclosed. The device may include a first source conductive pattern comprising a polycrystalline material including first crystal grains on a substrate, the substrate may comprising a polycrystalline material including second crystal grains, a grain size of the first crystal grains being smaller than a grain size of the second crystal grains, a stack including a plurality of gate electrodes, the plurality of gates stacked on the first source conductive pattern, and a vertical channel portion penetrating the stack and the first source conductive pattern, and the vertical channel portion being in contact with a side surface of the first source conductive pattern.