公开(公告)号：US20200266101A1

公开(公告)日：2020-08-20

申请号：US16868811

申请日：2020-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-yeong JOE ,  Seok-hoon KIM ,  Jeong-ho YOO ,  Seung-hun LEE ,  Geun-hee JEONG

IPC: H01L21/768 ,  H01L23/528

Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration.

公开(公告)号：US20210193516A1

公开(公告)日：2021-06-24

申请号：US17173784

申请日：2021-02-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-yeong JOE ,  Seok-hoon KIM ,  Jeong-ho YOO ,  Seung-hun LEE ,  Geun-hee JEONG

IPC: H01L21/768 ,  H01L23/528

Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration.

公开(公告)号：US20190363009A1

公开(公告)日：2019-11-28

申请号：US16275942

申请日：2019-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-yeong JOE ,  Seok-hoon KIM ,  Jeong-ho YOO ,  Seung-hun LEE ,  Geun-hee JEONG

IPC: H01L21/768 ,  H01L23/528

Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration.