公开(公告)号：US11552179B2

公开(公告)日：2023-01-10

申请号：US16893795

申请日：2020-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunsu Kim ,  Seonghun Park ,  Sunjung Lee ,  Hun Kim ,  Namgil You

IPC: H01L23/532 ,  H01L27/11526 ,  H01L27/11534 ,  H01L27/11521 ,  H01L27/11529 ,  H01L29/49 ,  G11C5/02

Abstract: A semiconductor device includes a peripheral circuit region comprising a first substrate, circuit elements on the first substrate, a first insulating layer covering the circuit elements, and a contact plug passing through the first insulating layer and disposed to be connected to the first substrate; and a memory cell region comprising a second substrate, gate electrodes on the second substrate and stacked in a vertical direction, and channel structures passing through the gate electrodes, wherein the contact plug comprises a metal silicide layer disposed to contact the first substrate and having a first thickness, a first metal nitride layer on the metal silicide layer to contact the metal silicide layer and having a second thickness, greater than the first thickness, a second metal nitride layer on the first metal nitride layer, and a conductive layer on the second metal nitride layer.

公开(公告)号：US20230163982A1

公开(公告)日：2023-05-25

申请号：US18081301

申请日：2022-12-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woongah YOON ,  Wooup Kwon ,  Hun Kim

IPC: H04L9/00 ,  G06F21/64 ,  H04L9/08 ,  H04L9/32

CPC classification number: H04L9/50 ,  G06F21/64 ,  H04L9/0825 ,  H04L9/3247

Abstract: An electronic device may include a memory storing a partial ledger including a part of a full ledger for a blockchain network, and at least one processor configured to generate an ending block as a block chained after the transaction block. The ending block includes an ending hash value of a transaction block and signature data and the signature data includes the ending hash value signed with a private key. The ending block may be chained after the transaction block. The ending block may be stored in the memory.

公开(公告)号：US10860061B2

公开(公告)日：2020-12-08

申请号：US16706006

申请日：2019-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daehyeong Park ,  Jongmin Choi ,  Jaehee Kim ,  Jongkeun Kim ,  Hun Kim ,  Donghyun Byun ,  Uyhyeon Jeong ,  Iksu Jung ,  Sunggun Cho ,  Chongkun Cho ,  Wonhee Choi ,  Seunghyun Hwang ,  Byounguk Yoon ,  Minsung Lee

IPC: G06F1/16 ,  H05K5/00 ,  H05K7/00

Abstract: An electronic device is provided that includes a housing including a front plate facing a first direction, a rear plate facing a second direction opposite to the first direction, and a lateral member surrounding a space between the front plate and the rear plate and at least partially constructed of a metal material, wherein the front plate includes a first edge having a first length and extending in a third direction, a second edge having a second length longer than the first length and extending in a fourth direction orthogonal to the third direction, a third edge parallel to the first edge, having the first length, and extending in the third direction from the second edge, a fourth edge parallel to the second edge, having the second length, and extending in the fourth direction from the first edge, a first region in which the third edge and the fourth edge meet, and a second region in which the second edge and the third edge meet, a display viewable through the front plate, and an adhesive layer constructed in a closed-curve shape along the first edge, second edge, third edge, and fourth edge of the front plate, wherein, when viewed from above the display, a width of the adhesive layer in the first region and the second region is greater than a width of the adhesive layer outside the first region and the second region.

公开(公告)号：US20150255336A1

公开(公告)日：2015-09-10

申请号：US14635017

申请日：2015-03-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyo-Jeong Moon ,  Woo-Cheol Noh ,  Woo-Jin Jang ,  Hun Kim ,  Hong-Jae Shin

IPC: H01L21/768

CPC classification number: H01L21/76871 ,  C23C14/185 ,  C23C14/3464 ,  H01L21/2855 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a method of manufacturing a semiconductor device, an insulating interlayer is formed on a substrate. The insulating interlayer is partially removed to form an opening. A barrier conductive layer is formed on a sidewall and a bottom of the opening. An RF sputtering process and a DC sputtering process are performed independently on the barrier conductive layer to form a seed layer. A plated layer is formed on the seed layer.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成绝缘中间层。 部分去除绝缘中间层以形成开口。 在开口的侧壁和底部上形成阻挡导电层。 在阻挡导电层上独立地进行RF溅射工艺和DC溅射工艺以形成种子层。 在种子层上形成镀层。

公开(公告)号：US09281240B2

公开(公告)日：2016-03-08

申请号：US14635017

申请日：2015-03-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyo-Jeong Moon ,  Woo-Choel Noh ,  Woo-Jin Jang ,  Hun Kim ,  Hong-Jae Shin

IPC: H01L21/768

CPC classification number: H01L21/76871 ,  C23C14/185 ,  C23C14/3464 ,  H01L21/2855 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a method of manufacturing a semiconductor device, an insulating interlayer is formed on a substrate. The insulating interlayer is partially removed to form an opening. A barrier conductive layer is formed on a sidewall and a bottom of the opening. An RF sputtering process and a DC sputtering process are performed independently on the barrier conductive layer to form a seed layer. A plated layer is formed on the seed layer.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成绝缘中间层。 部分去除绝缘中间层以形成开口。 在开口的侧壁和底部上形成阻挡导电层。 在阻挡导电层上独立地进行RF溅射工艺和DC溅射工艺以形成种子层。 在种子层上形成镀层。