Vertical-type memory device
    2.
    发明授权

    公开(公告)号:US10553606B2

    公开(公告)日:2020-02-04

    申请号:US15938101

    申请日:2018-03-28

    Abstract: A vertical-type memory device and a manufacturing method thereof, the device including a substrate having a cell array region and a connection region; gate electrode layers stacked on the cell array region and the connection region of the substrate, the gate electrode layers forming a stepped structure in the connection region; a cell channel layer in the cell array region, the cell channel layer passing through the plurality of gate electrode layers; a dummy channel layer in the connection region, the dummy channel layer passing through at least one gate electrode layer of the plurality of gate electrode layers; a cell epitaxial layer disposed below the cell channel layer; and a dummy epitaxial layer disposed below the dummy channel layer, wherein the dummy epitaxial layer has a shape that is different from a shape of the cell epitaxial layer.

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