公开(公告)号：US20170301388A1

公开(公告)日：2017-10-19

申请号：US15640854

申请日：2017-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAEHYUNG LEE ,  JungSik KIM ,  YOUNGDAE LEE ,  DUYEUL KIM ,  SUNGMIN YIM ,  KWANGIL PARK ,  CHULSUNG PARK

IPC: G11C11/4072 ,  G11C11/408 ,  G11C11/409 ,  G11C5/04 ,  H01L23/498 ,  G11C29/50 ,  G11C29/02 ,  H01L25/065 ,  G11C7/10

CPC classification number: G11C11/4072 ,  G11C5/04 ,  G11C7/1063 ,  G11C7/1075 ,  G11C7/109 ,  G11C11/408 ,  G11C11/409 ,  G11C29/022 ,  G11C29/028 ,  G11C29/50008 ,  H01L23/49838 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US20210210132A1

公开(公告)日：2021-07-08

申请号：US17205832

申请日：2021-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAEHYUNG LEE ,  JungSik KIM ,  YOUNGDAE LEE ,  DUYEUL KIM ,  SUNGMIN YIM ,  KWANGIL PARK ,  CHULSUNG PARK

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US20240011154A1

公开(公告)日：2024-01-11

申请号：US18125435

申请日：2023-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYUNJU LEE ,  BYEONGHOON KIM ,  HYOUNCHEOL KIM ,  JAEHYUNG LEE ,  BYUNGHWAN KONG

IPC: C23C16/455 ,  H01L21/673 ,  C23C16/458 ,  C23C16/46

CPC classification number: C23C16/45502 ,  H01L21/6732 ,  C23C16/4583 ,  C23C16/46

Abstract: A substrate processing apparatus may include an inner tube providing a process space extending vertically, an outer tube enclosing the inner tube, a gas supplying conduit connected to the process space, and a boat configured to be disposed in the process space. A first inner diameter of the inner tube at a first position may be different from a second inner diameter of the inner tube at a second position, and a level of the second position may be higher than a level of the first position.

公开(公告)号：US20220358987A1

公开(公告)日：2022-11-10

申请号：US17872720

申请日：2022-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAEHYUNG LEE ,  JungSik KIM ,  YOUNGDAE LEE ,  DUYEUL KIM ,  SUNGMIN YIM ,  KWANGIL PARK ,  CHULSUNG PARK

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US20200066323A1

公开(公告)日：2020-02-27

申请号：US16674554

申请日：2019-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAEHYUNG LEE ,  JungSik KIM ,  YOUNGDAE LEE ,  DUYEUL KIM ,  SUNGMIN YIM ,  KWANGIL PARK ,  CHULSUNG PARK

IPC: G11C11/4072 ,  G11C29/50 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C5/04 ,  G11C29/02 ,  H01L25/065

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US20190355407A1

公开(公告)日：2019-11-21

申请号：US16527415

申请日：2019-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAEHYUNG LEE ,  JungSik KIM ,  YOUNGDAE LEE ,  DUYEUL KIM ,  SUNGMIN YIM ,  KWANGIL PARK ,  CHULSUNG PARK

IPC: G11C11/4072 ,  G11C29/50 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C5/04 ,  H01L25/065 ,  G11C29/02

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.