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公开(公告)号:US20240250008A1
公开(公告)日:2024-07-25
申请号:US18453422
申请日:2023-08-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUSUK KANG , JU-IL CHOI , SUNG KEUN PARK , JONGHO PARK , HYUNJU LEE , JAEMOK JUNG
IPC: H01L23/498 , H01L23/00 , H01L23/31 , H01L25/10
CPC classification number: H01L23/49822 , H01L23/3107 , H01L23/49838 , H01L23/49866 , H01L24/16 , H01L25/105 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/35121
Abstract: A semiconductor package, comprising a redistribution substrate including an insulating layer and a first redistribution pattern; and a semiconductor chip electrically connected to the redistribution substrate, wherein the first redistribution pattern comprises a first barrier layer; a second barrier layer on the first barrier layer; and a via structure on the second barrier layer, wherein the first barrier layer comprises a first conductive material and the second barrier layer comprises a second conductive material different from the first conductive material.
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公开(公告)号:US20240011154A1
公开(公告)日:2024-01-11
申请号:US18125435
申请日:2023-03-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: HYUNJU LEE , BYEONGHOON KIM , HYOUNCHEOL KIM , JAEHYUNG LEE , BYUNGHWAN KONG
IPC: C23C16/455 , H01L21/673 , C23C16/458 , C23C16/46
CPC classification number: C23C16/45502 , H01L21/6732 , C23C16/4583 , C23C16/46
Abstract: A substrate processing apparatus may include an inner tube providing a process space extending vertically, an outer tube enclosing the inner tube, a gas supplying conduit connected to the process space, and a boat configured to be disposed in the process space. A first inner diameter of the inner tube at a first position may be different from a second inner diameter of the inner tube at a second position, and a level of the second position may be higher than a level of the first position.
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公开(公告)号:US20250006606A1
公开(公告)日:2025-01-02
申请号:US18416008
申请日:2024-01-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: HYUNJU LEE , GYUHO KANG , SUNG KEUN PARK , KWANGOK JEONG , JAEMOK JUNG , JU-IL CHOI
IPC: H01L23/498 , H01L23/00
Abstract: A semiconductor package may include: a substrate; a seed layer on a first surface of the substrate; a pad on the seed layer and including a first metal layer and a second metal layer on the first metal layer; an insulating layer on the first surface and including a side surface in contact with the second metal layer; and a semiconductor chip above a second surface of the substrate. An interface between the side surface of the insulating layer and the second metal layer may be nonplanar.
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