公开(公告)号：US10522550B2

公开(公告)日：2019-12-31

申请号：US16183826

申请日：2018-11-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Seok Lee ,  Jeong Seop Shim ,  Mi Na Lee ,  Augustin Jinwoo Hong ,  Je Min Park ,  Hye Jin Seong ,  Seung Min Oh ,  Do Yeong Lee ,  Ji Seung Lee ,  Jin Seong Lee

IPC: H01L27/108

Abstract: A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.

公开(公告)号：US20180175016A1

公开(公告)日：2018-06-21

申请号：US15830988

申请日：2017-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae Sun Kim ,  Hyun Jae Kang ,  Tae Hoi Park ,  Jin Seong Lee ,  Eun Sol Choi ,  Min Keun Kwak ,  Byung Kap Kim ,  Sung Won Choi

IPC: H01L27/02 ,  H01L23/528 ,  H01L23/522 ,  G06F17/50

Abstract: A semiconductor device includes a first overlay group and a second overlay group disposed on a semiconductor substrate. The first overlay group includes first lower overlay patterns which extend in a first direction, first upper overlay patterns overlapping the first lower overlay patterns, and first via overlay patterns interposed between the first lower overlay patterns and the first upper overlay patterns. The second overlay group includes second lower overlay patterns which extend in a second direction, second upper overlay patterns overlapping the second lower overlay patterns, and second via overlay patterns interposed between the second lower overlay patterns and the second upper overlay patterns. The second lower overlay patterns include end portions adjacent to and spaced apart from the first overlay group.

公开(公告)号：US10573633B2

公开(公告)日：2020-02-25

申请号：US15830988

申请日：2017-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Sun Kim ,  Hyun Jae Kang ,  Tae Hoi Park ,  Jin Seong Lee ,  Eun Sol Choi ,  Min Keun Kwak ,  Byung Kap Kim ,  Sung Won Choi

IPC: H01L23/48 ,  H01L27/02 ,  G06F17/50 ,  H01L23/522 ,  H01L23/528 ,  G03F7/20 ,  H01L23/544

Abstract: A semiconductor device includes a first overlay group and a second overlay group disposed on a semiconductor substrate. The first overlay group includes first lower overlay patterns which extend in a first direction, first upper overlay patterns overlapping the first lower overlay patterns, and first via overlay patterns interposed between the first lower overlay patterns and the first upper overlay patterns. The second overlay group includes second lower overlay patterns which extend in a second direction, second upper overlay patterns overlapping the second lower overlay patterns, and second via overlay patterns interposed between the second lower overlay patterns and the second upper overlay patterns. The second lower overlay patterns include end portions adjacent to and spaced apart from the first overlay group.

公开(公告)号：US10141316B2

公开(公告)日：2018-11-27

申请号：US15275827

申请日：2016-09-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Seok Lee ,  Jeong Seop Shim ,  Mi Na Lee ,  Augustin Jinwoo Hong ,  Je Min Park ,  Hye Jin Seong ,  Seung Min Oh ,  Do Yeong Lee ,  Ji Seung Lee ,  Jin Seong Lee

IPC: H01L27/108

Abstract: A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.