Semiconductor package and method for fabricating the same

    公开(公告)号:US11923283B2

    公开(公告)日:2024-03-05

    申请号:US17382872

    申请日:2021-07-22

    Inventor: Min Keun Kwak

    Abstract: A semiconductor package including a first package substrate, a first semiconductor chip on a top surface of the first package substrate, an interposer electrically connected to the first package substrate on a top surface of the first semiconductor chip, and a molding layer configured to cover the first package substrate and the first semiconductor chip may be provided. The interposer may include an interposer trench recessed from a bottom surface of the interposer that faces both the top surface of the first semiconductor chip and the top surface of the first package substrate, and an interposer hole penetrating the interposer. The molding layer may include a filling portion filling a region between the first package substrate and the interposer, a through portion filling the interposer hole, and a cover portion covering at least a part of a top surface of the interposer.

    SEMICONDUCTOR DEVICE INCLUDING OVERLAY PATTERNS

    公开(公告)号:US20180175016A1

    公开(公告)日:2018-06-21

    申请号:US15830988

    申请日:2017-12-04

    Abstract: A semiconductor device includes a first overlay group and a second overlay group disposed on a semiconductor substrate. The first overlay group includes first lower overlay patterns which extend in a first direction, first upper overlay patterns overlapping the first lower overlay patterns, and first via overlay patterns interposed between the first lower overlay patterns and the first upper overlay patterns. The second overlay group includes second lower overlay patterns which extend in a second direction, second upper overlay patterns overlapping the second lower overlay patterns, and second via overlay patterns interposed between the second lower overlay patterns and the second upper overlay patterns. The second lower overlay patterns include end portions adjacent to and spaced apart from the first overlay group.

    Semiconductor package
    3.
    发明授权

    公开(公告)号:US11450614B2

    公开(公告)日:2022-09-20

    申请号:US17035000

    申请日:2020-09-28

    Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.

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