公开(公告)号：US12119063B2

公开(公告)日：2024-10-15

申请号：US17957532

申请日：2022-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Wan Nam ,  Hyunggon Kim ,  Bong-Kil Jung ,  Younho Hong ,  Juseong Hwang

IPC: G11C16/08

CPC classification number: G11C16/08

Abstract: Disclosed is a memory device includes a memory block that is connected with a plurality of wordlines, a voltage generating circuit configured to output a first non-selection voltage through a plurality of driving lines, and an address decoding circuit configured to connect the plurality of driving lines with unselected wordlines of the plurality of wordlines. During a wordline setup period for the plurality of wordlines, the voltage generating circuit floats first driving lines corresponding to first unselected wordlines of the unselected wordlines from among the plurality of driving lines when the first unselected wordlines reach a first target level, and floats second driving lines corresponding to second unselected wordlines of the unselected wordlines from among the plurality of driving lines when the second unselected wordlines reach a second target level different from the first target level.

公开(公告)号：US11074127B1

公开(公告)日：2021-07-27

申请号：US16860241

申请日：2020-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanguhn Cha ,  Juseong Hwang

IPC: G06F11/10 ,  G11C11/406 ,  G06F11/07

Abstract: A semiconductor memory device includes an ECC circuit; an error information register; a scrubbing control circuit to count refresh row addresses and output a scrubbing address for a scrubbing operation to be performed on at least one sub-page in a first memory cell row each time N refresh row addresses are counted; and a control logic circuit configured to: control the ECC circuit to sequentially read data corresponding to a first codeword, perform error detection on the first codeword, and provide error information based on the error detection, the error information indicating an error occurrence count in the first codeword; and record the error information in the error information register and selectively determine, based on the error information, whether to write back a corrected first codeword in a memory location in which the data corresponding to the first codeword is stored.