-
公开(公告)号：US12089408B2
公开(公告)日：2024-09-10
申请号：US17697386
申请日：2022-03-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Bongsoon Lim , Hyunggon Kim
CPC classification number: H10B43/27 , G11C16/0483 , G11C16/06 , H10B43/40
Abstract: A non-volatile memory device including a memory cell region over a peripheral circuit region. The memory cell region includes an upper substrate, channel structures extending in a vertical direction, and a first upper metal line extending in a first direction. The peripheral circuit region includes a first lower metal line extending in a second direction, and first and second via structures on the first lower metal line, a top surface of the second via structure in contact with the upper substrate. The memory cell region includes a first through-hole via structure passing through the upper substrate and the first via structure, and electrically connecting the first upper metal line to the first lower metal line; and the first upper metal line is electrically connected to the upper substrate through the first through-hole via structure, the first lower metal line, and the second via structure.
-
公开(公告)号：US11532361B2
公开(公告)日：2022-12-20
申请号：US17380289
申请日：2021-07-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Minseok Kim , Hyunggon Kim
Abstract: A non-volatile memory device receives a read command and an address from a controller, and performs a data recovery read operation in response to the read command. In the data recovery read operation, an operation of obtaining aggressor group information from a memory cell connected to a word line adjacent to a word line selected according to the address, and an operation of recovering data corresponding to the obtained aggressor group information in a memory cell connected to the word line selected according to the address, are repeatedly performed on each of a plurality of aggressor groups.
-
3.发明授权公开(公告)号：US12161439B2
公开(公告)日：2024-12-10
申请号：US17043388
申请日：2019-04-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chungsoon Park , Kyungmin Kim , Sujin Park , Hyunggon Kim
Abstract: Disclosed is an electronic device comprising: a biometric sensor, including at least one light emitting diode (LED) and at least one light receiving unit, for acquiring biometric information by means of the at least one light emitting device and the at least one light receiving unit; a power receiving circuit configured to receive a wireless power signal from an external electronic device; and a processor operatively coupled to the biometric sensor and the power receiving circuit. The processor may be configured to receive a designated wireless power signal from the external electronic device by using the power receiving circuit and to perform optical communication with the external electronic device by using the biosensor when the designated wireless power signal is received. Other various embodiments identified from the specification are also possible.
-
4.发明授权公开(公告)号：US11626171B2
公开(公告)日：2023-04-11
申请号：US17201828
申请日：2021-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Joonsuc Jang , Hyunggon Kim , Sangbum Yun , Dongwook Kim , Kyungsoo Park , Sejin Baek
Abstract: A method of programming a nonvolatile memory device includes performing a single-pulse program operation in a program loop, determining whether a condition is satisfied in the a program loop, and performing a multi-pulse program operation in a next program loop when the condition is satisfied. The single-pulse program operation includes applying a first program pulse and applying plural verification pulses, the multi-pulse program operation includes applying a second program pulse, applying a third program pulse, and applying plural verification pulses, and each of the second program pulse and the third program pulse has a level lower than a level of the first program pulse.
-
公开(公告)号：US20220130463A1
公开(公告)日：2022-04-28
申请号：US17380289
申请日：2021-07-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Minseok Kim , Hyunggon Kim
Abstract: A non-volatile memory device receives a read command and an address from a controller, and performs a data recovery read operation in response to the read command. In the data recovery read operation, an operation of obtaining aggressor group information from a memory cell connected to a word line adjacent to a word line selected according to the address, and an operation of recovering data corresponding to the obtained aggressor group information in a memory cell connected to the word line selected according to the address, are repeatedly performed on each of a plurality of aggressor groups.
-
Patent Agency Ranking
6.发明授权公开(公告)号：US12062402B2
公开(公告)日：2024-08-13
申请号：US17385493
申请日：2021-07-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Byungsoo Kim , Hyunggon Kim , Kyungsoo Park , Sejin Baek , Sangbum Yun
CPC classification number: G11C16/3459 , G11C16/0433 , G11C16/08 , G11C16/102 , G11C16/24 , G11C16/26 , G11C16/30
Abstract: A non-volatile memory device including a memory cell array including a plurality of cell strings, wherein each cell string of the plurality of cell stings includes a string selection transistor, a plurality of memory cells, and a ground selection transistor connected in series between a bit line and a common source line; and a control circuit configured to perform a program operation on a selected memory cell from among the plurality of memory cells and pre-charge a selected cell string including the selected memory cell in a pre-charge section included in a verification section, wherein the selected cell string is pre-charged as a first pre-charge voltage is applied to a selected bit line connected to the selected memory cell.
-
公开(公告)号：US20220093184A1
公开(公告)日：2022-03-24
申请号：US17324333
申请日：2021-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jisu Kim , Hyunggon Kim , Sangsoo Park , Joonsuc Jang , Minseok Kim
Abstract: Provided is a storage device that performs a read operation by using a time interleaved sampling page buffer. The storage device controls a sensing point in time, when bit lines of even page buffer circuits are sensed, and a sensing point in time, when bit lines of odd page buffer circuits are sensed, with a certain time difference, and performs an Even Odd Sensing (EOS) operation in a stated order of even sensing and odd sensing. The storage device performs a two-step EOS operation and performs a main sensing operation on a selected memory cell according to a result of the two-step EOS operation.
-
公开(公告)号：US10459667B2
公开(公告)日：2019-10-29
申请号：US15406840
申请日：2017-01-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Bong-Kil Jung , Hyunggon Kim
Abstract: A nonvolatile memory device includes a nonvolatile memory cell array, where N bits are stored in a single memory cell (N being an integer greater than or equal to 2), and a page buffer circuit electrically connected to the nonvolatile memory cell array. The page buffer circuit includes at least N latches configured to temporarily store data. A data input/output circuit connected to the page buffer circuit receives programmed input data and provides the input data to the page buffer circuit. A control logic controls the page buffer and initializes a target latch value before receiving all input data of a program unit from the data input/output circuit.
-
公开(公告)号：US12205646B2
公开(公告)日：2025-01-21
申请号：US17483088
申请日：2021-09-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Minseok Kim , Joonsuc Jang , Hyunggon Kim , Seonyong Lee
Abstract: A method of operating a memory device, the method including: performing a first program operation to form a plurality of first threshold voltage distributions; and performing a second program operation by using a coarse verification voltage and a fine verification voltage based on offset information to form a plurality of second threshold voltage distributions respectively corresponding to a plurality of program states from the plurality of first threshold voltage distributions, wherein the offset information includes a plurality of offsets that vary according to characteristics of the second threshold voltage distributions.
-
公开(公告)号：US12119063B2
公开(公告)日：2024-10-15
申请号：US17957532
申请日：2022-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sang-Wan Nam , Hyunggon Kim , Bong-Kil Jung , Younho Hong , Juseong Hwang
IPC: G11C16/08
CPC classification number: G11C16/08
Abstract: Disclosed is a memory device includes a memory block that is connected with a plurality of wordlines, a voltage generating circuit configured to output a first non-selection voltage through a plurality of driving lines, and an address decoding circuit configured to connect the plurality of driving lines with unselected wordlines of the plurality of wordlines. During a wordline setup period for the plurality of wordlines, the voltage generating circuit floats first driving lines corresponding to first unselected wordlines of the unselected wordlines from among the plurality of driving lines when the first unselected wordlines reach a first target level, and floats second driving lines corresponding to second unselected wordlines of the unselected wordlines from among the plurality of driving lines when the second unselected wordlines reach a second target level different from the first target level.
-
-
-
-
-
-
-
-
-
Search Results
20
records
(took 0.03 seconds)
