公开(公告)号：US20230326813A1

公开(公告)日：2023-10-12

申请号：US17837453

申请日：2022-06-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： BYOUNGHAK HONG ,  Wookhyun Kwon ,  Hyoeun Park ,  Kangill Seo

IPC: H01L21/66

CPC classification number: H01L22/34

Abstract: Integrated circuit devices may include a cell transistor and a parameter measuring structure (e.g., a resistance measuring structure). The cell transistor may be on a first surface of a substrate structure, which is opposite a second surface thereof. The parameter measuring structure may include first and second contact structures that extend through the substrate structure. The second surface of the substrate structure may expose respective portions of the first and second contact structures.

公开(公告)号：US12211760B2

公开(公告)日：2025-01-28

申请号：US17837453

申请日：2022-06-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byounghak Hong ,  Wookhyun Kwon ,  Hyoeun Park ,  Kangill Seo

IPC: H01L21/66

Abstract: Integrated circuit devices may include a cell transistor and a parameter measuring structure (e.g., a resistance measuring structure). The cell transistor may be on a first surface of a substrate structure, which is opposite a second surface thereof. The parameter measuring structure may include first and second contact structures that extend through the substrate structure. The second surface of the substrate structure may expose respective portions of the first and second contact structures.

公开(公告)号：US20230354570A1

公开(公告)日：2023-11-02

申请号：US17816809

申请日：2022-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inchan Hwang ,  Jaemyung Choi ,  Kangill Seo

IPC: H01L27/11 ,  G11C11/412 ,  G11C11/419

CPC classification number: H01L27/1104 ,  H01L27/1116 ,  G11C11/412 ,  G11C11/419

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a static random access memory (SRAM) unit. The SRAM unit may include a first inverter on a substrate and a power distribution network (PDN) structure including a first power rail and a second power rail. The substrate may extend between the first inverter and the PDN structure. The first inverter may include a first upper transistor including a first upper source/drain region, a first lower transistor between the substrate and the first upper transistor and including a first lower source/drain region, a first power contact extending through the substrate and electrically connecting the first upper source/drain region to the first power rail, and a second power contact extending through the substrate and electrically connecting the first lower source/drain region to the second power rail.