公开(公告)号：US12174683B2

公开(公告)日：2024-12-24

申请号：US17956195

申请日：2022-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junhee Yoo ,  Jaehyun Kim ,  Jingyu Ahn ,  Wooil Kim ,  Manhwee Jo

IPC: G06F1/3234 ,  G11C7/22

Abstract: A system on chip (SoC) and an application processor are provided. The SoC includes a memory controller configured to control a memory; a plurality of function modules configured to access the memory through a memory interface; a system interconnect circuit configured to operate based on a first clock signal and connect the memory interface and the plurality of function modules; and a power controller configured to control the first clock signal to be periodically gated, and control the memory to operate in a lower-power mode during a period in which the first clock signal is gated.

公开(公告)号：US20220374038A1

公开(公告)日：2022-11-24

申请号：US17749681

申请日：2022-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghwan Oh ,  Sunwook Kim ,  Wooil Kim ,  Manhwee Jo

IPC: G06F1/08

Abstract: Disclosed is an integrated circuit, which counts parameters required for a dynamic voltage frequency scaling (DVFS) operation. The integrated circuit includes: an event block accessing a bus, which connects processing devices to each other, and outputting an event signal, based on data transmitted through the bus; a clock counter counting the number of clock signals received from a clock management unit; a plurality of performance counters respectively counting parameters used to calculate a workload, based on the event signal; an interface receiving an operation signal from the DVFS governor, which determines an operation frequency and an operation voltage of a processing device based on the workload, and transmitting the number of clock signals and the parameters to the DVFS governor; and a controller controlling operations of the event block, the clock counter, and the plurality of performance counters, based on the operation signal.

公开(公告)号：US11927981B2

公开(公告)日：2024-03-12

申请号：US17749681

申请日：2022-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghwan Oh ,  Sunwook Kim ,  Wooil Kim ,  Manhwee Jo

IPC: G06F1/32 ,  G06F1/08 ,  G06F1/324 ,  G06F1/3296

CPC classification number: G06F1/08 ,  G06F1/324 ,  G06F1/3296

Abstract: Disclosed is an integrated circuit, which counts parameters required for a dynamic voltage frequency scaling (DVFS) operation. The integrated circuit includes: an event block accessing a bus, which connects processing devices to each other, and outputting an event signal, based on data transmitted through the bus; a clock counter counting the number of clock signals received from a clock management unit; a plurality of performance counters respectively counting parameters used to calculate a workload, based on the event signal; an interface receiving an operation signal from the DVFS governor, which determines an operation frequency and an operation voltage of a processing device based on the workload, and transmitting the number of clock signals and the parameters to the DVFS governor; and a controller controlling operations of the event block, the clock counter, and the plurality of performance counters, based on the operation signal.