公开(公告)号：US20250040038A1

公开(公告)日：2025-01-30

申请号：US18782938

申请日：2024-07-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minseok LEE ,  Sujung KIM ,  Myungkyoon CHUNG

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

Abstract: An electronic device may include: a printed circuit board; and a capacitor disposed on the printed circuit board. The printed circuit board may include: a conductive layer including at least one slit in an area adjacent to the capacitor, and an insulation layer directly on the conductive layer and including a portion in the at least one slit. The at least one slit may be parallel to at least one side surface of the capacitor, and spaced apart from the at least one side surface of the capacitor by a first distance or less. The at least one slit may not overlap the capacitor when viewed from above.

公开(公告)号：US20240257310A1

公开(公告)日：2024-08-01

申请号：US18417246

申请日：2024-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Giyoung HEO ,  Daeho LEE ,  Minseok LEE

IPC: G06T5/50 ,  G06T5/70

CPC classification number: G06T5/50 ,  G06T5/70 ,  G06T2207/10144 ,  G06T2207/20208

Abstract: An image processor including an interface circuit configured to receive a plurality of images corresponding to a plurality of exposure times from an external sensor, and a high dynamic range (HDR) synthesis circuit configured to synthesize a first HDR image, based on a first image and a second image among the plurality of images, synthesize a second HDR image, based on a third image among the plurality of images and the first HDR image, apply a first weight including weight values respectively corresponding to pixels of the first HDR image to the first HDR image, and apply a second weight including weight values respectively corresponding to pixels of the third image to the third image to synthesize the second HDR image.

公开(公告)号：US20220004353A1

公开(公告)日：2022-01-06

申请号：US17480678

申请日：2021-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byunggun CHOI ,  Minseok LEE

IPC: G06F3/16 ,  H01Q1/46 ,  H04B1/18

Abstract: An electronic device, according to various embodiments, comprises: a connector configured to removably couple with a plug of an external audio device; a data signal line connected to at least one pin of the connector; and a processor, wherein the processor may be configured to identify a connection of the plug of the external audio device; and receive, through the data signal line, an audio signal from a codec connected to an antenna signal receiver in the external audio device. Additional various embodiments can be provided.

公开(公告)号：US20160335125A1

公开(公告)日：2016-11-17

申请号：US15146044

申请日：2016-05-04

Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute of Science and Technology

Inventor： Minseok LEE ,  John Dongjun KIM ,  Woong SEO ,  Soojung RYU ,  Yeongon CHO

IPC: G06F9/50

CPC classification number: G06F9/5038 ,  G06F9/46

Abstract: A processor and corresponding method are described including cores having a thread set allocated based on a pre-set implementation order, and a controller configured to receive scheduling information determined based on an implementation pattern regarding the allocated thread set from one of the cores and transmit the scheduling information to another of the cores. The one of cores determines the scheduling information according to characteristics of an application when implementation of the thread set is completed. Each of the cores re-determines an implementation order regarding the allocated thread set based on the determined scheduling information.

Abstract translation: 描述了一种处理器和相应的方法，其包括具有基于预设实现顺序分配的线程集的核心，以及控制器，被配置为接收基于从一个核心分配的线程集合的实现模式确定的调度信息，并发送 将信息调度到另一个核心。 当线程集合的实现完成时，核心之一根据应用的特性确定调度信息。 每个核心基于所确定的调度信息重新确定关于所分配的线程组的实现顺序。

公开(公告)号：US20160205042A1

公开(公告)日：2016-07-14

申请号：US14950490

申请日：2015-11-24

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  Korea Advanced Institute of Science and Technology

Inventor： Woong SEO ,  Minseok LEE ,  Dongjun KIM ,  Soojung RYU ,  Yeongon CHO

IPC: H04L12/933 ,  H04L12/761

CPC classification number: H04L49/102 ,  H04L45/16

Abstract: A method of transceiving data over an on-chip network includes determining whether a packet is received by a first router among a plurality of first routers constituting a ring network; determining a transmission destination of the packet received by the first router; and transmitting the packet to a second router among a plurality of second routers constituting a bus network connected to the first router in response to the determined transmission destination being located on the bus network connected to the first router.

Abstract translation: 一种通过片上网络收发数据的方法包括：确定构成环网的多个第一路由器中的第一路由器是否接收到分组; 确定由第一路由器接收的分组的传输目的地; 以及响应于所确定的发送目的地位于连接到所述第一路由器的总线网络上，将构成连接到所述第一路由器的总线网络的多个第二路由器中的所述分组发送到第二路由器。