公开(公告)号：US20220130811A1

公开(公告)日：2022-04-28

申请号：US17368028

申请日：2021-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeho LEE ,  Taeje CHO

IPC: H01L25/18 ,  H01L25/065 ,  H01L23/00

Abstract: A stacked-chip package of the inventive concepts includes a first chip and a second chip stacked on the first chip. The first chip may include a first cell array region, a first core circuit region including a first core terminal, and a first peripheral circuit region including a plurality of first peripheral circuit terminals. The second chip may include a second cell array region on the first cell array region, a second core circuit region on the first core circuit region and including a second core terminal, and a through via on the first peripheral circuit region and connected to at least one first peripheral circuit terminal of the plurality of first peripheral circuit terminals.

公开(公告)号：US20210407971A1

公开(公告)日：2021-12-30

申请号：US17160878

申请日：2021-01-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeho LEE ,  Kilsoo KIM

IPC: H01L25/10 ,  H01L23/538

Abstract: A semiconductor package includes a lower redistribution layer having a plurality of lower ball pads forming a plurality of lower ball pad groups, a semiconductor chip on the lower redistribution layer, an expanded layer surrounding the semiconductor chip on the lower redistribution layer, and an upper redistribution layer on the semiconductor chip and the expanded layer and having a plurality of upper ball pads forming a plurality of upper ball pad groups. The number of the plurality of upper ball pad groups may be the same as the number of the of the plurality lower ball pad groups. Each of the upper ball pads in one of the plurality of upper ball pad groups, from among the plurality of upper ball pads, may be a dummy ball pad.

公开(公告)号：US20240284048A1

公开(公告)日：2024-08-22

申请号：US18543527

申请日：2023-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeyun JUNG ,  Joonyeon KIM ,  Daeho LEE

IPC: H04N23/68 ,  H04N23/80

CPC classification number: H04N23/683 ,  H04N23/6812 ,  H04N23/815

Abstract: An electronic device includes a motion sensor, an image signal processor core, an image stabilizer, and an image size controller. The motion sensor generates camera motion data by sensing motion of a camera module that captures an image to generate an original frame image. The image signal processor core generates processed frame image by processing input frame image corresponding to the original frame image. The image stabilizer generates an output frame image by performing electronic image stabilization of the processed frame image. The image size controller estimates a motion level indicating a degree of camera motion of the camera module based on the camera motion data and control a size of the input frame image or a size of the output frame image based on the motion level. The image stabilization is efficiently performed by estimating camera motion and adjusting the image size according to the camera motion.

公开(公告)号：US20240203969A1

公开(公告)日：2024-06-20

申请号：US18418964

申请日：2024-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeho LEE ,  Taeje CHO

IPC: H01L25/18 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/18 ,  H01L24/08 ,  H01L25/0657 ,  H01L2224/08146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1436

Abstract: A stacked-chip package of the inventive concepts includes a first chip and a second chip stacked on the first chip. The first chip may include a first cell array region, a first core circuit region including a first core terminal, and a first peripheral circuit region including a plurality of first peripheral circuit terminals. The second chip may include a second cell array region on the first cell array region, a second core circuit region on the first core circuit region and including a second core terminal, and a through via on the first peripheral circuit region and connected to at least one first peripheral circuit terminal of the plurality of first peripheral circuit terminals.

公开(公告)号：US20230387090A1

公开(公告)日：2023-11-30

申请号：US18447535

申请日：2023-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeho LEE ,  Kilsoo KIM

IPC: H01L25/10 ,  H01L23/538

CPC classification number: H01L25/105 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/5383 ,  H01L2225/1047

Abstract: A semiconductor package includes a lower redistribution layer having a plurality of lower ball pads forming a plurality of lower ball pad groups, a semiconductor chip on the lower redistribution layer, an expanded layer surrounding the semiconductor chip on the lower redistribution layer, and an upper redistribution layer on the semiconductor chip and the expanded layer and having a plurality of upper ball pads forming a plurality of upper ball pad groups. The number of the plurality of upper ball pad groups may be the same as the number of the of the plurality lower ball pad groups. Each of the upper ball pads in one of the plurality of upper ball pad groups, from among the plurality of upper ball pads, may be a dummy ball pad.

公开(公告)号：US20240257310A1

公开(公告)日：2024-08-01

申请号：US18417246

申请日：2024-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Giyoung HEO ,  Daeho LEE ,  Minseok LEE

IPC: G06T5/50 ,  G06T5/70

CPC classification number: G06T5/50 ,  G06T5/70 ,  G06T2207/10144 ,  G06T2207/20208

Abstract: An image processor including an interface circuit configured to receive a plurality of images corresponding to a plurality of exposure times from an external sensor, and a high dynamic range (HDR) synthesis circuit configured to synthesize a first HDR image, based on a first image and a second image among the plurality of images, synthesize a second HDR image, based on a third image among the plurality of images and the first HDR image, apply a first weight including weight values respectively corresponding to pixels of the first HDR image to the first HDR image, and apply a second weight including weight values respectively corresponding to pixels of the third image to the third image to synthesize the second HDR image.

公开(公告)号：US20220367553A1

公开(公告)日：2022-11-17

申请号：US17745010

申请日：2022-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungkyu KIM ,  Dong-Hun LEE ,  Woonbae KIM ,  Daeho LEE ,  Jungpil LEE

IPC: H01L27/146

Abstract: A semiconductor package including a substrate including a through hole, an image sensor structure on the substrate, and a first transparent substrate on the substrate and spaced apart from the image sensor structure may be provided. The image sensor structure includes a logic chip on the substrate, a first sensing chip on an active surface of the logic chip, and a second sensing chip on an inactive surface of the logic chip and connected to the active surface of the logic chip through a first via that vertically penetrates the logic chip. On a bottom surface of the logic chip, at least a portion of one of the first sensing chip and the second sensing chip is in the through hole.