公开(公告)号：US20160163020A1

公开(公告)日：2016-06-09

申请号：US14959724

申请日：2015-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Woon KIM ,  Sung Chul YOON ,  Sang Hoon LEE ,  Ha Na YANG

IPC: G06T1/60 ,  G09G5/399 ,  G06T1/20

CPC classification number: G06T1/60 ,  G06F3/0611 ,  G06F3/0683 ,  G06T1/20 ,  G06T3/40 ,  G09G5/393 ,  G09G5/399 ,  G09G2340/00

Abstract: An image processor, an application processor, a method of operating an image processor, and a chips set of an image processor are provided. The image processor includes a scaler configured to perform scaling on an input image and generate a scaled input image; and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal. The application processor includes a memory configured to store an input image; and an image processor configured to scale the input image, wherein the image processor comprises a scaler configured to perform scaling on the input image and generate a scaled input image and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal.

Abstract translation: 提供图像处理器，应用处理器，操作图像处理器的方法以及图像处理器的芯片组。 图像处理器包括缩放器，其被配置为对输入图像执行缩放并生成缩放的输入图像; 以及选择电路，被配置为根据存储器选择信号将缩放的输入图像传送到低延迟存储器或高密度存储器。 应用处理器包括被配置为存储输入图像的存储器; 以及图像处理器，其被配置为缩放所述输入图像，其中所述图像处理器包括缩放器，所述缩放器被配置为对所述输入图像执行缩放并生成缩放的输入图像，以及选择电路，被配置为将缩放的输入图像发送到低延迟存储器或 根据存储器选择信号的高密度存储器。

公开(公告)号：US20230070191A1

公开(公告)日：2023-03-09

申请号：US17728421

申请日：2022-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Ae KIM ,  Seong Woon KIM ,  Kil Whan LEE ,  Sang Hoon LEE ,  Yong Kwon CHO ,  Sang Hoon HA

IPC: H04N5/235 ,  G06T1/20 ,  G06T1/60 ,  G06T5/00

Abstract: A system on chip and a mobile device are provided. The mobile device comprises a processor configured to receive raw image data, process the raw image data into floating-point format image data, and output the floating-point format image data, a memory configured to store therein the floating-point format image data, and a display processing unit configured to receive the floating-point format image data stored in the memory therefrom, and perform high dynamic range (HDR) processing on the floating-point format image data.

公开(公告)号：US20140244908A1

公开(公告)日：2014-08-28

申请号：US14144682

申请日：2013-12-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong Woon KIM ,  Kwan Ho KIM ,  Seok Min KIM ,  Tae Sun KIM

IPC: G06F12/06

CPC classification number: G06F12/06 ,  G06F12/0292

Abstract: A method of operating an integrated circuit is provided. The method includes receiving a data block offset from a second storage device, obtaining a target entry address using the data block offset, and reading an entry among a plurality of entries comprised in a buffer descriptor stored in a first storage device based on the target entry address. The method also includes reading data from a data buffer among a plurality of data buffers included in the first storage device using a physical address included in the entry and transmitting the data to the second storage device.

Abstract translation: 提供一种操作集成电路的方法。 该方法包括从第二存储设备接收数据块偏移量，使用数据块偏移获取目标条目地址，以及基于目标条目读取包含在存储在第一存储设备中的缓冲器描述符中的多个条目中的条目 地址。 该方法还包括使用包含在条目中的物理地址从包括在第一存储装置中的多个数据缓冲器中的数据缓冲器读取数据，并将数据发送到第二存储装置。

公开(公告)号：US20230169909A1

公开(公告)日：2023-06-01

申请号：US17867033

申请日：2022-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Woon KIM ,  Kil Whan LEE ,  Sun-Ae KIM ,  Sang Hoon LEE ,  Yong Kwon CHO ,  Sang Hoon HA

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G2360/18 ,  G09G2360/12

Abstract: A display controller includes a resource controller configured to receive layer information about each of a first layer and a second layer that are output at different times through a display panel during a unit frame. The display controller includes a data input direct memory access (DMA) configured to receive first image data corresponding to the first layer and second image data corresponding to the second layer, and a hardware resource configured to receive the first and second image data from the data input DMA, process the received first and second image data according to the layer information, and generate first layer data of the first layer and second layer data of the second layer. The resource controller is configured to control the data input DMA according to the layer information to determine an order in which the first and second image data are provided to the hardware resource.