公开(公告)号：US11257741B2

公开(公告)日：2022-02-22

申请号：US16692333

申请日：2019-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo Pu ,  Jun So Pak ,  Sung Wook Moon

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package may comprise: a first passivation layer forming an electrical connection with one or more first bumps; a substrate layer including a second passivation layer and a silicon layer; a back-end-of-line (BEOL) layer formed on the substrate layer; and a third passivation layer formed on the BEOL layer forming an electrical connection with one or more second bumps, wherein the substrate layer includes a first signal TSV (Through Silicon Via) which transmits a first signal between the BEOL layer and a first lower pad, a second signal TSV which transmits a second signal between the BEOL layer and a second lower pad, and a ground TSV which is disposed between the first signal TSV and the second signal TSV and formed so that one end thereof is connected to the BEOL layer and the other end thereof floats.

公开(公告)号：US20170263567A1

公开(公告)日：2017-09-14

申请号：US15363257

申请日：2016-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Wook Moon ,  Min Sung Kim ,  Eun Seok Song ,  Kyoung Ho Kim ,  Dong Chul Kim ,  Jin Ho Kim ,  Ji Hyun Lee

IPC: H01L23/552 ,  H01L23/58 ,  G09G3/20 ,  H01L23/498

CPC classification number: H01L23/552 ,  G09G3/2092 ,  G09G2300/043 ,  G09G2310/0264 ,  G09G2330/021 ,  G09G2330/028 ,  G09G2330/06 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/585 ,  H01L24/17 ,  H01L2224/16227 ,  H01L2924/1426 ,  H01L2924/3025

Abstract: A semiconductor package includes an integrated circuit mounted on a substrate, a first power line disposed on or above the substrate and configured to transmit an operating voltage to the integrated circuit, and a second power line disposed on or above the substrate and configured to transmit a ground voltage to the integrated circuit, in which each of the first power line and the second power line has a first width, the first power line is spaced apart from the second power line by a first distance, thicknesses of each of the first power line and the second power line are less than or equal to 20 μm, and a ratio of the first width to the first distance is greater than 2.5.