MEMORY TUNNELING INTERFACE
    1.
    发明公开

    公开(公告)号:US20230305972A1

    公开(公告)日:2023-09-28

    申请号:US17704553

    申请日:2022-03-25

    CPC classification number: G06F13/1668 G06F13/1663 G06F9/4498 G06F9/30101

    Abstract: An apparatus may include a memory device, a memory controller, or both that can communicate via memory standard interfaces. However, the memory device may have physical memory that does not comply with the memory standard by itself. Disclosed herein are solutions that allow various non-standard types of memory, or emerging memory, to be utilized via a host, microprocessor, or memory controller that implements the interface standard. For example, by utilizing a command converter at the microprocessor and a tunneling register at the memory device, a microprocessor can send commands to the memory device by writing them to the tunneling register, which can then be processed at the memory device for operations to be performed with the non-standard or emerging memory.

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