摘要:
The cache memory system 1 comprises: a virtual index obtaining unit 13 operable to obtain, based on a virtual address, virtual indexes of an access-target cache line and a cache line potentially having a cache-aliasing relationship with the access-target cache line; a physical tag obtaining unit 15 operable to obtain a physical tag of a physical page by performing address translation on the virtual address; and a comparing unit 16 operable to compare a physical tag TAG obtained by the physical tag obtaining unit 15 with each tag information piece TAG(i) belonging to cache lines corresponding to the virtual indexes and output from the tag array 11a based on the virtual indexes obtained by the virtual index obtaining unit 13, and determines a cache hit/miss.
摘要:
The cache memory system 1 comprises: a virtual index obtaining unit 13 operable to obtain, based on a virtual address, virtual indexes of an access-target cache line and a cache line potentially having a cache-aliasing relationship with the access-target cache line; a physical tag obtaining unit 15 operable to obtain a physical tag of a physical page by performing address translation on the virtual address; and a comparing unit 16 operable to compare a physical tag TAG obtained by the physical tag obtaining unit 15 with each tag information piece TAG(i) belonging to cache lines corresponding to the virtual indexes and output from the tag array 11a based on the virtual indexes obtained by the virtual index obtaining unit 13, and determines a cache hit/miss.
摘要:
A process scheduling apparatus has a delayed task handling process for processing delayed tasks having variable priorities and multiple other processes for handling processes other than delayed tasks. Fixed priorities are assigned to the other processes. The process scheduler sequentially executes the delayed task handling process and the other processes according the assigned priorities. A delayed task registration processor stores newly generated delayed tasks with assigned priorities in a queuing table. A delayed task priority controller selects the delayed task with the highest priority in the queuing table. A process priority controller sets the priority of the delayed task handling process to the same priority as the priority of the delayed task with the highest priority.
摘要:
To start up an operating system (OS), CPU performs initializations in three modes: The three modes include a first I/O initialization (Early init) (132) which is to be done serially when no threads are yet usable, without any advanced technique and with a long wait time until a next operation can be made; a second I/O initialization (136) which is to be done when threads are usable, in a plurality of steps parallelized with each other using the usable threads according to the dependency relation between devices to be initialized and with synchronization between the steps each by a barrier; and a third I/O initialization (Lazy init) (140) in which remaining initializations are done in parallel with each other using the threads commensurately to a user process when the user process becomes executable. The present invention is applicable to home-use electric or electronic appliances.
摘要:
A data transmitting apparatus for transmitting data to a plurality of data receiving apparatuses comprises acquiring means, organizing means, and transmitting means. The acquiring means acquires a plurality of sets of selection data, each set of which is targeted for one data receiving apparatus model. The organizing means compares the plurality of sets of selection data and extracts common data and unique data. The common data is a portion of one set of selection data that is also contained in one or more other sets of selection data, and the unique data is a remaining portion in each set of selection data left after excluding the common data. The transmitting means transmits the common data and the unique data together to the plurality of data receiving apparatuses.
摘要:
A code export symbol offset table A 1128 stores sets of the identifier and the offset of the area of a code symbol. In an export symbol import step 1160, the identifier that matches the identifier of a symbol is retrieved from the code export symbol offset table A 1128, the offset corresponding to the retrieved identifier is extracted, and a predetermined calculation is performed to create an absolute address.
摘要:
A multimedia data reproduction apparatus comprising an optical disk library containing a plurality of optical disks and a plurality of optical disk drives, a file management unit for managing names of motion picture files stored in the respective optical disks, a media management unit for managing whether each of the optical disks is being used or not, a drive management unit for managing whether each of the optical disk drives is being used or not, an open processing unit for deciding whether to accept a request to start reading or reject it according to information from the file management unit, media management unit and the drive management unit, a close processing unit for performing close processing of a motion picture file for which a request to end reading is issued, a data readout control unit for reading motion picture data in response to the request to start reading, and a network control unit for controlling communication between the above-mentioned units and terminal PCs 20. In this apparatus, it is possible to continuously reproduce motion pictures from the optical disk library.
摘要:
In this system, program data is generated by configuring a plurality of modules based on a relationship between dependence of the modules composing the program. Then, generated two versions of program data is compared starting from a head address of each of the program data, and data at an address, and thereafter, where the data first makes a difference is extracted to generate difference data. Further, a center holds the latest version of program and at least one item of difference data, and transmits the whole data of program or difference data corresponding to a program version in a terminal apparatus, and the program is updated in the terminal apparatus using the received data.
摘要:
An arithmetic unit includes a switching device 16 and a cache controller 19. The switching device 16 determines whether desired data to be read by the CPU 11 is in a RAM 14, and allows, depending on a result of the determination, the CPU 11 to directly read the desired data from a ROM 13. The cache controller 19 controls a cache 12 so that the RAM 14 is initialized based on cache data corresponding to the desired data stored in the cache 12. In an arithmetic unit having a CPU, a cache, RAM, and ROM configured in the above manner, the time required for a startup process is reduced.
摘要:
The present invention provides an information processor and an information processing method, which reduces the memory capacity and utilizes a free space in a memory area as a cache area for EPG. This information processor includes a program obtaining means 5, a program storage means 2 which has plural storage areas, a program execution means 13, a selection information updating means 11 that stores execution memory information indicating a storage area which contains a program to be executed by the program execution means 13, compression information which indicates compression states of programs stored in the storage areas, and memory relation information which indicates the relation of the plural storage areas, a program execution area switching means 4 for selecting one of the storage areas on the basis of the execution memory information, a storage area switching means 3 for selecting one of the storage areas on the basis of the information in the selection information updating means 11, a program writing means 6, a program compression means 7, a program restoration means 12 for restoring a program which has been compressed by the program compression means 7, and a memory information updating means 8 for updating information stored in the selection information updating means 11.