公开(公告)号：US10756823B2

公开(公告)日：2020-08-25

申请号：US15975307

申请日：2018-05-09

Applicant: Silicon Laboratories Inc.

Inventor： Carlos Briseno-Vidrios ,  Michael R. May ,  Patrick J. de Bakker

IPC: H04B10/80 ,  H04L23/00 ,  H04B3/00 ,  H01L23/00 ,  H04B1/40 ,  H01L25/16

Abstract: A first die is communicatively coupled to a first isolation communication channel and a second isolation communication channel and configured to send a first heartbeat signal over the first isolation communication channel. A second die is coupled to receive the first heartbeat signal from the first die over the first isolation communication channel and to supply a second heartbeat signal to the second isolation communication channel. The first die enters a first die low power mode responsive to detecting an absence of the second heartbeat signal and the second die enters a second die low power mode responsive to detecting an absence of the first heartbeat signal. The first and second die use low power oscillators in the low power mode to supply the heartbeat signals.

公开(公告)号：US10976366B2

公开(公告)日：2021-04-13

申请号：US16165058

申请日：2018-10-19

Applicant: Silicon Laboratories Inc.

Inventor： Patrick J. de Bakker ,  Michael R. May

IPC: G01R31/28 ,  G01R31/3177 ,  G01R31/317

Abstract: A scan controller provides a translation between a two terminal external interface and a four signal line internal scan interface to a digital core of the integrated circuit. The two terminal external interface has an input terminal and an input/output terminal. The input terminal receives a clock signal and the input/output terminal serially receives a scan enable signal and a scan in data bit. A state machine controls the scan controller. The scan in data bit, the scan enable signal, and a scan clock signal are supplied in parallel to the internal scan interface. The digital logic provides a scan out data bit and the scan controller supplies the scan out data bit over the input/output terminal in synchronism with the clock signal.