公开(公告)号：US08970038B2

公开(公告)日：2015-03-03

申请号：US13677939

申请日：2012-11-15

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chun-Hung Lu ,  Chung-Te Yuan ,  Guang-Hwa Ma

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/522 ,  H01L21/768 ,  H01L23/14 ,  H01L23/498

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/16 ,  H01L2224/73204

Abstract: A semiconductor substrate is provided, including: a substrate; a plurality of conductive through vias embedded in the substrate; a first dielectric layer formed on the substrate; a metal layer formed on the first dielectric layer; and a second dielectric layer formed on the metal layer. As such, when a packaging substrate is disposed on the second dielectric layer, the metal layer provides a reverse stress to balance thermal stresses caused by the first and second dielectric layers, thereby preventing warpage of the semiconductor substrate.

Abstract translation: 提供一种半导体衬底，包括：衬底; 多个导电通孔嵌入基板中; 形成在所述基板上的第一电介质层; 形成在所述第一电介质层上的金属层; 以及形成在所述金属层上的第二电介质层。 因此，当包装基板设置在第二电介质层上时，金属层提供反向应力以平衡由第一和第二电介质层引起的热应力，从而防止半导体衬底翘曲。

公开(公告)号：US20140021617A1

公开(公告)日：2014-01-23

申请号：US13677939

申请日：2012-11-15

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chun-Hung Lu ,  Chung-Te Yuan ,  Guang-Hwa Ma

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/16 ,  H01L2224/73204

Abstract: A semiconductor substrate is provided, including: a substrate; a plurality of conductive through vias embedded in the substrate; a first dielectric layer formed on the substrate; a metal layer formed on the first dielectric layer; and a second dielectric layer formed on the metal layer. As such, when a packaging substrate is disposed on the second dielectric layer, the metal layer provides a reverse stress to balance thermal stresses caused by the first and second dielectric layers, thereby preventing warpage of the semiconductor substrate.

Abstract translation: 提供一种半导体衬底，包括：衬底; 多个导电通孔嵌入基板中; 形成在所述基板上的第一电介质层; 形成在所述第一电介质层上的金属层; 以及形成在所述金属层上的第二电介质层。 因此，当包装基板设置在第二电介质层上时，金属层提供反向应力以平衡由第一和第二电介质层引起的热应力，从而防止半导体衬底翘曲。