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公开(公告)号:US20240381776A1
公开(公告)日:2024-11-14
申请号:US18315477
申请日:2023-05-10
Inventor: SHENG KAI YEH , CHI-YUAN SHIH , SHIH-FEN HUANG , WEI CHUN WANG , SHAO-DA WANG
IPC: H10N30/20 , H10N30/082 , H10N30/50
Abstract: A semiconductor structure includes a substrate, a piezoelectric layer, and a stress structure. The substrate includes a first surface and a second surface, wherein a portion of the substrate proximal to the first surface defines a diaphragm. The piezoelectric layer is disposed over the first surface of the substrate and surrounds the diaphragm, wherein the piezoelectric layer includes a first portion and a second portion arranged along a periphery of the diaphragm from a top view. The stress structure includes a plurality of dielectric layers disposed over the piezoelectric layer and between the substrate and the piezoelectric layer, and a total thickness of a first portion of the stress structure overlapping the first portion of the piezoelectric layer is different from a total thickness of a second portion of the stress structure overlapping the second portion of the piezoelectric layer. A method for manufacturing a semiconductor structure is also provided.