-
公开(公告)号：US10599514B2
公开(公告)日：2020-03-24
申请号：US15844259
申请日：2017-12-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Saket Jalan , Indu Prathapan , Abishek Ganapati Karkisaval
Abstract: Error correction code (ECC) hardware includes write generation (Gen) ECC logic and a check ECC block coupled to an ECC output of a memory circuit with read Gen ECC logic coupled to an XOR circuit that outputs a syndrome signal to a syndrome decode block coupled to a single bit error correction block. A first MUX receives the write data is in series with an input to the write Gen ECC logic or a second MUX receives the read data from the memory circuit in series with an input of the read Gen ECC logic A cross-coupling connector couples the read data from the memory circuit to a second input of the first MUX or for coupling the write data to a second input of the second MUX. An ECC bit comparator compares an output of the write Gen ECC logic to the read Gen ECC logic output.
-
公开(公告)号：US20180107541A1
公开(公告)日：2018-04-19
申请号：US15844259
申请日：2017-12-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Saket Jalan , Indu Prathapan , Abishek Ganapati Karkisaval
Abstract: Error correction code (ECC) hardware includes write generation (Gen) ECC logic and a check ECC block coupled to an ECC output of a memory circuit with read Gen ECC logic coupled to an XOR circuit that outputs a syndrome signal to a syndrome decode block coupled to a single bit error correction block. A first MUX receives the write data is in series with an input to the write Gen ECC logic or a second MUX receives the read data from the memory circuit in series with an input of the read Gen ECC logic A cross-coupling connector couples the read data from the memory circuit to a second input of the first MUX or for coupling the write data to a second input of the second MUX. An ECC bit comparator compares an output of the write Gen ECC logic to the read Gen ECC logic output.
-
Search Results
2
records
(took 0.01 seconds)
