公开(公告)号：US10298126B1

公开(公告)日：2019-05-21

申请号：US15900798

申请日：2018-02-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anmol Sharma ,  Franz Prexl

IPC: H02M3/157 ,  H03K4/94 ,  H02M3/158 ,  H03K4/06 ,  H02M1/088 ,  H02M1/00 ,  G05F1/575

Abstract: A circuit, comprising a trapezoidal generator that comprises digital logic configured to couple at a first input to a loop controller and at a second input to a buck-boost region detector and a driver coupled to an output of the digital logic and configured to couple to at least one power transistor of a power converter.

公开(公告)号：US10958173B2

公开(公告)日：2021-03-23

申请号：US16232214

申请日：2018-12-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Franz Prexl ,  Anmol Sharma

IPC: H02M3/158 ,  H02M1/08

Abstract: The present disclosure provides for a processing element configured to couple to a first ramp generator and a second ramp generator and control the first ramp generator while a power converter is operating in a buck-boost mode of operation to generate a first ramp signal beginning at a first value and increasing to a second value during a first clock cycle and generate the first ramp signal beginning at the first value and increasing to a third value during a second clock cycle following the first clock cycle and control the second ramp generator while the power converter is operating in the buck-boost mode of operation to generate a second ramp signal beginning at a fourth value and decreasing to a fifth value during the first clock cycle and generate the second ramp signal beginning at the fourth value and decreasing to a sixth value during the second clock cycle.

公开(公告)号：US20190238055A1

公开(公告)日：2019-08-01

申请号：US16378837

申请日：2019-04-09

Applicant: Texas Instruments Incorporated

Inventor： Anmol Sharma ,  Franz Prexl

IPC: H02M3/157 ,  H03K4/06 ,  H02M3/158 ,  H02M1/088 ,  H03K4/94

CPC classification number: H02M3/157 ,  G05F1/575 ,  H02M1/088 ,  H02M3/1582 ,  H02M2001/0009 ,  H03K4/063 ,  H03K4/94

Abstract: A circuit, comprising a trapezoidal generator that comprises digital logic configured to couple at a first input to a loop controller and at a second input to a buck-boost region detector and a driver coupled to an output of the digital logic and configured to couple to at least one power transistor of a power converter.