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公开(公告)号：US11101727B1
公开(公告)日：2021-08-24
申请号：US16790218
申请日：2020-02-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anmol Sharma , Thomas Keller , Gerhard Thiele
Abstract: A power converter includes a watchdog circuit having an input adapted to be coupled to a pause signal of a switching power supply. The watchdog circuit is configured to provide a start signal at an output thereof based on the pause signal indicating that the power converter has stopped switching for a threshold duration that is less than an audible range. A pulse generator circuit has an input coupled to the output of the watchdog circuit and is configured to generate at least one pulse based on the start signal. A switch circuit has an input terminal adapted to be coupled to an input voltage and at least one other terminal adapted to be coupled to an inductor. The switch circuit is configured to provide negative current from an output of the power converter through the at least one other terminal based on the at least one pulse.
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公开(公告)号：US10298126B1
公开(公告)日：2019-05-21
申请号：US15900798
申请日：2018-02-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anmol Sharma , Franz Prexl
Abstract: A circuit, comprising a trapezoidal generator that comprises digital logic configured to couple at a first input to a loop controller and at a second input to a buck-boost region detector and a driver coupled to an output of the digital logic and configured to couple to at least one power transistor of a power converter.
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公开(公告)号：US10958173B2
公开(公告)日：2021-03-23
申请号：US16232214
申请日：2018-12-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Franz Prexl , Anmol Sharma
Abstract: The present disclosure provides for a processing element configured to couple to a first ramp generator and a second ramp generator and control the first ramp generator while a power converter is operating in a buck-boost mode of operation to generate a first ramp signal beginning at a first value and increasing to a second value during a first clock cycle and generate the first ramp signal beginning at the first value and increasing to a third value during a second clock cycle following the first clock cycle and control the second ramp generator while the power converter is operating in the buck-boost mode of operation to generate a second ramp signal beginning at a fourth value and decreasing to a fifth value during the first clock cycle and generate the second ramp signal beginning at the fourth value and decreasing to a sixth value during the second clock cycle.
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公开(公告)号：US11507128B1
公开(公告)日：2022-11-22
申请号：US17462081
申请日：2021-08-31
Applicant: Texas Instruments Incorporated
Inventor： Anmol Sharma
Abstract: An electronic device has a modulator circuit, a pulse adjustment circuit, and a pulse generator circuit. The modulator circuit generates a comparator output signal based on a sensed inductor current signal of a power converter, an error amplifier output voltage signal, and a ramp signal to regulate an output voltage signal of the power converter. The pulse adjustment circuit generates an adjusted pulse signal based on the comparator output signal and the error amplifier output voltage signal, and to generate an adjusted clock signal based on an input clock signal and the error amplifier output voltage signal. The pulse generator circuit generates a switching control signal to control a transistor of the power converter based on the adjusted pulse signal and the adjusted clock signal.
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公开(公告)号：US11977402B2
公开(公告)日：2024-05-07
申请号：US17537358
申请日：2021-11-29
Applicant: Texas Instruments Incorporated
Inventor： Anmol Sharma
IPC: G05F1/56
CPC classification number: G05F1/56
Abstract: A semiconductor device includes a low power fast differential transconductor, which provides an output current as a function of a difference between a reference potential input and a feedback potential input. The transconductance increases as an absolute value of the difference between the reference potential and the feedback potential increases. The transconductor includes a reference input stage to receive the reference potential and a reference load coupled in series with the reference input stage. The transconductor includes a feedback input stage to receive the feedback potential and a feedback load coupled in series with the feedback input stage. The transconductor further includes a current limiting component that is configured to control a total current through the reference input stage and the feedback input stage. The transconductor includes a negative feedback path from the reference load to the current limiting component, that compensates for changes in the total current due to differences between the reference potential and the feedback potential.
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Patent Agency Ranking
公开(公告)号：US11916486B2
公开(公告)日：2024-02-27
申请号：US17460804
申请日：2021-08-30
Applicant: Texas Instruments Incorporated
Inventor： Anmol Sharma
CPC classification number: H02M3/33507 , H02M1/0009 , H02M1/08
Abstract: A compensation circuit includes a tail current source, an error amplifier; a compensation resistor, and a voltage-to-current converter circuit. The tail current source is configured to generate a tail current. The error amplifier is coupled to the tail current source and biased by the tail current. The compensation resistor is coupled to the error amplifier. The voltage-to-current converter circuit is coupled to the error amplifier. The compensation resistor is configured to vary in resistance responsive to a change in the tail current, or the voltage-to-current converter circuit is configured to vary in transconductance responsive to the change in the tail current.
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公开(公告)号：US11081960B2
公开(公告)日：2021-08-03
申请号：US15927302
申请日：2018-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anmol Sharma
Abstract: Aspects of the disclosure provide for a circuit. In an example, the circuit includes an input circuit having a first output and a second output, a first timer having a first input coupled to the first output of the input circuit, a second timer having a first input coupled to the second output of the input circuit, a second input coupled to an output of the first timer, and an output coupled to a second input of the first timer, and an output circuit coupled to the output of the first timer and the output of the second timer.
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公开(公告)号：US10931198B2
公开(公告)日：2021-02-23
申请号：US16158944
申请日：2018-10-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anmol Sharma
Abstract: Aspects of the present disclosure provide for a circuit. In an example, the circuit comprises a buck-boost region detector. The buck-boost region detector comprises a timing criterions circuit that comprises a timer, a mode determination circuit coupled to the timing criterions circuit and comprising a processing element, and a switching circuit coupled to the mode determination circuit and comprising a digital logic structure.
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公开(公告)号：US20230168701A1
公开(公告)日：2023-06-01
申请号：US17537358
申请日：2021-11-29
Applicant: Texas Instruments Incorporated
Inventor： Anmol Sharma
IPC: G05F1/56
CPC classification number: G05F1/56
Abstract: A semiconductor device includes a low power fast differential transconductor, which provides an output current as a function of a difference between a reference potential input and a feedback potential input. The transconductance increases as an absolute value of the difference between the reference potential and the feedback potential increases. The transconductor includes a reference input stage to receive the reference potential and a reference load coupled in series with the reference input stage. The transconductor includes a feedback input stage to receive the feedback potential and a feedback load coupled in series with the feedback input stage. The transconductor further includes a current limiting component that is configured to control a total current through the reference input stage and the feedback input stage. The transconductor includes a negative feedback path from the reference load to the current limiting component, that compensates for changes in the total current due to differences between the reference potential and the feedback potential.
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公开(公告)号：US20190238055A1
公开(公告)日：2019-08-01
申请号：US16378837
申请日：2019-04-09
Applicant: Texas Instruments Incorporated
Inventor： Anmol Sharma , Franz Prexl
CPC classification number: H02M3/157 , G05F1/575 , H02M1/088 , H02M3/1582 , H02M2001/0009 , H03K4/063 , H03K4/94
Abstract: A circuit, comprising a trapezoidal generator that comprises digital logic configured to couple at a first input to a loop controller and at a second input to a buck-boost region detector and a driver coupled to an output of the digital logic and configured to couple to at least one power transistor of a power converter.
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