-
公开(公告)号：US20190086561A1
公开(公告)日：2019-03-21
申请号：US16181386
申请日：2018-11-06
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Nagesh Surendranath , Goli Sravana Kumar
IPC: G01T1/24
Abstract: A photon counting system includes a photon sensor, a charge-sensitive amplifier (CSA) and an analog-to-digital converter (ADC). The CSA is configured to convert photon energy detected by the photon sensor to voltage pulses. The ADC is configured to digitize the voltage pulses generated by the CSA. The ADC includes successive approximation circuitry. The successive approximation circuitry includes an N-bit digital-to-analog converter (DAC), an N-bit successive approximation register (SAR), a plurality of N-bit registers, and a multiplexer configured to selectively route outputs of the SAR and outputs of the N-bit registers to the DAC for conversion to an analog signal.
-
Patent Agency Ranking
公开(公告)号：US10060864B2
公开(公告)日：2018-08-28
申请号：US15900621
申请日：2018-02-20
Applicant: Texas Instruments Incorporated
Inventor： Goli Sravana Kumar , Nagesh Surendranath
CPC classification number: G01N23/04 , A61B6/42 , H04N5/32 , H04N5/3575 , H04N5/378
Abstract: The disclosure provides a receiver with reduced noise. The receiver includes a photodiode that generates an input signal in response to received light pulses. A pixel switch is coupled to the photodiode. An operational amplifier is coupled to the photodiode through the pixel switch. A feedback capacitor and a reset switch are coupled between a first input port and an output port of the operational amplifier. A switched resistor network is coupled to the output port of the operational amplifier. A first switched capacitor network is coupled to the switched resistor network and samples a reset voltage. A second switched capacitor network is coupled to the switched resistor network and samples a signal voltage. A subtractor receives the reset voltage and the signal voltage, and generates a sample voltage. The second switched network comprises two or more capacitors.
-
公开(公告)号：US10481283B2
公开(公告)日：2019-11-19
申请号：US16181386
申请日：2018-11-06
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Nagesh Surendranath , Goli Sravana Kumar
Abstract: A photon counting system includes a photon sensor, a charge-sensitive amplifier (CSA) and an analog-to-digital converter (ADC). The CSA is configured to convert photon energy detected by the photon sensor to voltage pulses. The ADC is configured to digitize the voltage pulses generated by the CSA. The ADC includes successive approximation circuitry. The successive approximation circuitry includes an N-bit digital-to-analog converter (DAC), an N-bit successive approximation register (SAR), a plurality of N-bit registers, and a multiplexer configured to selectively route outputs of the SAR and outputs of the N-bit registers to the DAC for conversion to an analog signal.
-
公开(公告)号：US10151845B1
公开(公告)日：2018-12-11
申请号：US15667445
申请日：2017-08-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rakul Viswanath , Nagesh Surendranath , Goli Sravana Kumar
IPC: G01T1/24
Abstract: A photon counting system includes a photon sensor, a charge-sensitive amplifier (CSA) and an analog-to-digital converter (ADC). The CSA is configured to convert photon energy detected by the photon sensor to voltage pulses. The ADC is configured to digitize the voltage pulses generated by the CSA. The ADC includes successive approximation circuitry. The successive approximation circuitry includes an N-bit digital-to-analog converter (DAC), an N-bit successive approximation register (SAR), a plurality of N-bit registers, and a multiplexer configured to selectively route outputs of the SAR and outputs of the N-bit registers to the DAC for conversion to an analog signal.
-
公开(公告)号：US20180180559A1
公开(公告)日：2018-06-28
申请号：US15900621
申请日：2018-02-20
Applicant: Texas Instruments Incorporated
Inventor： Goli Sravana Kumar , Nagesh Surendranath
CPC classification number: G01N23/04 , A61B6/42 , H04N5/32 , H04N5/3575 , H04N5/378
Abstract: The disclosure provides a receiver with reduced noise. The receiver includes a photodiode that generates an input signal in response to received light pulses. A pixel switch is coupled to the photodiode. An operational amplifier is coupled to the photodiode through the pixel switch. A feedback capacitor and a reset switch are coupled between a first input port and an output port of the operational amplifier. A switched resistor network is coupled to the output port of the operational amplifier. A first switched capacitor network is coupled to the switched resistor network and samples a reset voltage. A second switched capacitor network is coupled to the switched resistor network and samples a signal voltage. A subtractor receives the reset voltage and the signal voltage, and generates a sample voltage. The second switched network comprises two or more capacitors.
-
公开(公告)号：US20150268360A1
公开(公告)日：2015-09-24
申请号：US14658291
申请日：2015-03-16
Applicant: Texas Instruments Incorporated
Inventor： Goli Sravana Kumar , Nagesh Surendranath
CPC classification number: G01N23/04 , A61B6/42 , H04N5/32 , H04N5/3575 , H04N5/378
Abstract: The disclosure provides a receiver with reduced noise. The receiver includes a photodiode that generates an input signal in response to received light pulses. A pixel switch is coupled to the photodiode. An operational amplifier is coupled to the photodiode through the pixel switch. A feedback capacitor and a reset switch are coupled between a first input port and an output port of the operational amplifier. A switched resistor network is coupled to the output port of the operational amplifier. A first switched capacitor network is coupled to the switched resistor network and samples a reset voltage. A second switched capacitor network is coupled to the switched resistor network and samples a signal voltage. A subtractor receives the reset voltage and the signal voltage, and generates a sample voltage. The second switched network comprises two or more capacitors.
Abstract translation: 本公开提供了具有降低的噪声的接收机。 接收机包括响应于接收的光脉冲而产生输入信号的光电二极管。 像素开关耦合到光电二极管。 运算放大器通过像素开关耦合到光电二极管。 反馈电容器和复位开关耦合在运算放大器的第一输入端口和输出端口之间。 开关电阻网络耦合到运算放大器的输出端口。 第一开关电容器网络耦合到开关电阻网络并对复位电压进行采样。 第二开关电容器网络耦合到开关电阻网络并对信号电压进行采样。 减法器接收复位电压和信号电压，并产生采样电压。 第二交换网络包括两个或更多个电容器。
-
-
-
-
-
Search Results
6
records
(took 0.014 seconds)
