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公开(公告)号：US20190086561A1
公开(公告)日：2019-03-21
申请号：US16181386
申请日：2018-11-06
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Nagesh Surendranath , Goli Sravana Kumar
IPC: G01T1/24
Abstract: A photon counting system includes a photon sensor, a charge-sensitive amplifier (CSA) and an analog-to-digital converter (ADC). The CSA is configured to convert photon energy detected by the photon sensor to voltage pulses. The ADC is configured to digitize the voltage pulses generated by the CSA. The ADC includes successive approximation circuitry. The successive approximation circuitry includes an N-bit digital-to-analog converter (DAC), an N-bit successive approximation register (SAR), a plurality of N-bit registers, and a multiplexer configured to selectively route outputs of the SAR and outputs of the N-bit registers to the DAC for conversion to an analog signal.
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公开(公告)号：US10024979B1
公开(公告)日：2018-07-17
申请号：US15800313
申请日：2017-11-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rakul Viswanath , Nagesh Surendranath , Ratna Kumar Venkata Parupudi
IPC: G01T1/172
Abstract: A photon counting system includes a photon sensor and pixel circuitry. The pixel circuitry includes a charge sensitive amplifier (CSA), an analog to digital converter (ADC), an event detector, and a coincidence detector. The CSA is configured to convert photon energy detected by the photon sensor to a voltage pulse. The ADC is coupled to an output of the CSA. The ADC is configured to digitize the voltage pulses generated by the CSA. The event detector is configured to determine whether output voltage of the CSA exceeds an event threshold voltage, and to trigger the ADC to digitize the output voltage based on the output voltage exceeding the event threshold voltage. The coincidence detector is configured to determine whether the output voltage of the CSA exceeds a coincidence threshold voltage, and to trigger the ADC to digitize the output voltage based on the output voltage exceeding the coincidence threshold voltage.
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公开(公告)号：US11682745B2
公开(公告)日：2023-06-20
申请号：US16884812
申请日：2020-05-27
Applicant: Texas Instruments Incorporated
Inventor： Eduardo Bartolome , Rakul Viswanath
CPC classification number: H01L31/09 , H01L21/4846 , H01L21/568 , H01L24/19 , H01L27/14634 , H01L27/14636 , H01L27/14645 , H01L27/14649 , H01L27/14658 , H01L31/085 , H01L31/18
Abstract: In a described example, an apparatus includes: a photon detector array with a first signal output pad coupled to a photon detector array pixel; a die carrier comprising a readout integrated circuit (ROIC) die and a conductor layer having conductors that couple a first signal input pad on the conductor layer to an input signal lead of the ROIC die; and the first signal output pad coupled to the first signal input pad.
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公开(公告)号：US11092482B2
公开(公告)日：2021-08-17
申请号：US16277653
申请日：2019-02-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Nagesh Surendranath , Rakul Viswanath
Abstract: A circuit for use in a system that includes a detector, wherein the circuit comprises an input terminal to receive a detector signal from the detector external to the circuit, the detector signal to include an error charge corresponding to a leakage current. The circuit further comprises an amplifier coupled to the input terminal to receive input signals corresponding to the detector signal, including the error charge applied to an input of the amplifier. The circuit further comprises a feedback path coupled across the amplifier, wherein the feedback path comprises a first switch coupled across a leakage resistor and to a leakage capacitor for discharging a feedback compensation charge from the leakage capacitor and onto the input of the amplifier to substantially cancel the error charge.
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公开(公告)号：US10151845B1
公开(公告)日：2018-12-11
申请号：US15667445
申请日：2017-08-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rakul Viswanath , Nagesh Surendranath , Goli Sravana Kumar
IPC: G01T1/24
Abstract: A photon counting system includes a photon sensor, a charge-sensitive amplifier (CSA) and an analog-to-digital converter (ADC). The CSA is configured to convert photon energy detected by the photon sensor to voltage pulses. The ADC is configured to digitize the voltage pulses generated by the CSA. The ADC includes successive approximation circuitry. The successive approximation circuitry includes an N-bit digital-to-analog converter (DAC), an N-bit successive approximation register (SAR), a plurality of N-bit registers, and a multiplexer configured to selectively route outputs of the SAR and outputs of the N-bit registers to the DAC for conversion to an analog signal.
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Patent Agency Ranking
6.发明公开公开(公告)号：US20240213998A1
公开(公告)日：2024-06-27
申请号：US18129604
申请日：2023-03-31
Applicant: Texas Instruments Incorporated
Inventor： Rajashekar Goroju , Prasanth K , Dileepkumar Ramesh Bhat , Rakul Viswanath , Sravana Kumar Goli , Rahul Sharma
IPC: H03M1/38
CPC classification number: H03M1/38
Abstract: An example apparatus includes: controller circuitry configured to: provide switch signals to capacitive digital to analog converter (C-DAC) circuitry, the C-DAC circuitry including switches; configuring the switches into a third configuration begin an Auto Zero (AZ) phase with a third switch in a closed state; configuring the switches into a fourth configuration to repeat the transition of the third switch to the open state corresponding to a first configuration; configuring the switches into a fifth configuration to repeat the transition of a first switch and a second switch to the open state corresponding to a second configuration; configuring the switches into a sixth configuration to repeat the transition of the third switch to the closed state corresponding to a second configuration; and performing an AZ decision with the switches in the sixth configuration.
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公开(公告)号：US11493649B2
公开(公告)日：2022-11-08
申请号：US17114962
申请日：2020-12-08
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Nagesh Surendranath , Sandeep Kesrimal Oswal , Ratna Kumar Venkata Parupudi
Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.
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公开(公告)号：US09287862B2
公开(公告)日：2016-03-15
申请号：US14533787
申请日：2014-11-05
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Rahul Sharma
CPC classification number: H03K17/063 , G01N23/046 , H03K17/16 , H03K2217/0036 , H03M3/496 , H05G1/70
Abstract: A bootstrap circuit for a sampling transistor. A circuit includes a MOS transistor having a source terminal coupled to an input for receiving an input voltage; an output at a drain terminal of the MOS transistor coupled to one plate of a sampling capacitor; a first switch coupling the input voltage to a gate terminal of the MOS transistor responsive to an initial phase control signal; a bootstrap capacitor having a top plate coupled to the gate terminal of the MOS transistor and coupled to the first switch; a second switch coupling a bottom plate of the bootstrap capacitor to a first low voltage supply responsive to the initial phase control signal; a third switch coupling the bottom plate of the bootstrap capacitor to a positive voltage supply greater than the first low voltage supply responsive to a first phase periodic control signal. Additional circuits and systems are disclosed.
Abstract translation: 用于采样晶体管的自举电路。 电路包括MOS晶体管，其源极端子耦合到用于接收输入电压的输入端; 耦合到采样电容器的一个板的MOS晶体管的漏极端子处的输出; 响应于初始相位控制信号将输入电压耦合到MOS晶体管的栅极端子的第一开关; 自举电容器，其具有耦合到所述MOS晶体管的所述栅极端子并耦合到所述第一开关的顶板; 第二开关，其将所述自举电容器的底板耦合到响应于所述初始相位控制信号的第一低电压电源; 第三开关，其将所述自举电容器的底板耦合到响应于第一相位周期控制信号的大于所述第一低电压电源的正电压电源。 公开了附加电路和系统。
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公开(公告)号：US20150188533A1
公开(公告)日：2015-07-02
申请号：US14533787
申请日：2014-11-05
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Rahul Sharma
CPC classification number: H03K17/063 , G01N23/046 , H03K17/16 , H03K2217/0036 , H03M3/496 , H05G1/70
Abstract: A bootstrap circuit for a sampling transistor. A circuit includes a MOS transistor having a source terminal coupled to an input for receiving an input voltage; an output at a drain terminal of the MOS transistor coupled to one plate of a sampling capacitor; a first switch coupling the input voltage to a gate terminal of the MOS transistor responsive to an initial phase control signal; a bootstrap capacitor having a top plate coupled to the gate terminal of the MOS transistor and coupled to the first switch; a second switch coupling a bottom plate of the bootstrap capacitor to a first low voltage supply responsive to the initial phase control signal; a third switch coupling the bottom plate of the bootstrap capacitor to a positive voltage supply greater than the first low voltage supply responsive to a first phase periodic control signal. Additional circuits and systems are disclosed.
Abstract translation: 用于采样晶体管的自举电路。 电路包括MOS晶体管，其源极端子耦合到用于接收输入电压的输入端; 耦合到采样电容器的一个板的MOS晶体管的漏极端子处的输出; 响应于初始相位控制信号将输入电压耦合到MOS晶体管的栅极端子的第一开关; 自举电容器，其具有耦合到所述MOS晶体管的所述栅极端子并耦合到所述第一开关的顶板; 第二开关，其将所述自举电容器的底板耦合到响应于所述初始相位控制信号的第一低电压电源; 第三开关，其将所述自举电容器的底板耦合到响应于第一相位周期控制信号的大于所述第一低电压电源的正电压电源。 公开了附加电路和系统。
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公开(公告)号：US11543291B2
公开(公告)日：2023-01-03
申请号：US17245436
申请日：2021-04-30
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Sachin Aithal
IPC: G01J1/44
Abstract: An analog front-end circuit includes an array of pixel circuits. Each pixel circuit includes an event counter and a power consumption circuit. The event counter is configured to count photons incident at the pixel circuit. The power compensation circuit includes an event rate circuit and a current sink circuit. The event rate circuit is configured to determine a rate of photon detection events at the pixel circuit. The current sink circuit is configured to pass a compensation current selected based on the rate of photon detection events at the pixel circuit.
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