Gate driver bootstrap circuits and related methods

    公开(公告)号:US11342911B2

    公开(公告)日:2022-05-24

    申请号:US16801746

    申请日:2020-02-26

    Abstract: Gate driver bootstrap circuits and related methods are disclosed. An example gate driver stage includes a first terminal and a second terminal, the first terminal to be coupled to a capacitor, the capacitor and the second terminal to be coupled to a gate terminal of a power transistor, a gate driver coupled to the first terminal and the second terminal, and a bootstrap circuit coupled to the first terminal, the second terminal, and the gate driver, the bootstrap circuit including a control stage circuit having an output and a first transistor having a first gate terminal and a first current terminal, the first gate terminal coupled to the output, the first current terminal coupled to the first terminal.

    Power converter with zero-voltage switching

    公开(公告)号:US11264903B2

    公开(公告)日:2022-03-01

    申请号:US15707257

    申请日:2017-09-18

    Abstract: A power converter circuit includes a power stage that includes a transformer and a switch. The switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node between the switch and the primary winding having a switching voltage. The circuit also includes a switching controller configured to generate the PWM signal in response to a ramp signal. The ramp signal can have an amplitude of a slope that is proportional to a decay rate of a magnetizing current of the transformer and generated in response to feedback from the power stage. The switch can be activated in response to the switching voltage having an amplitude of approximately zero volts based on the amplitude of the ramp signal.

    GATE DRIVER BOOTSTRAP CIRCUITS AND RELATED METHODS

    公开(公告)号:US20210119627A1

    公开(公告)日:2021-04-22

    申请号:US16801746

    申请日:2020-02-26

    Abstract: Gate driver bootstrap circuits and related methods are disclosed. An example gate driver stage includes a first terminal and a second terminal, the first terminal to be coupled to a capacitor, the capacitor and the second terminal to be coupled to a gate terminal of a power transistor, a gate driver coupled to the first terminal and the second terminal, and a bootstrap circuit coupled to the first terminal, the second terminal, and the gate driver, the bootstrap circuit including a control stage circuit having an output and a first transistor having a first gate terminal and a first current terminal, the first gate terminal coupled to the output, the first current terminal coupled to the first terminal.

    Slew-rate compensated transistor turnoff system

    公开(公告)号:US11283448B2

    公开(公告)日:2022-03-22

    申请号:US17078329

    申请日:2020-10-23

    Abstract: One example includes a circuit that includes a transistor control circuit having an input and an output adapted to be coupled to the output of the transistor control circuit and can provide a slew-rate compensation voltage proportional to a slew-rate of a control voltage of the transistor. A reference voltage source can be coupled to the slew-rate compensator to provide a reference voltage at the output of the reference voltage source, the slew-rate compensator configured to add the slew-rate compensation voltage to the reference voltage to provide an adjusted reference voltage at the output of the slew rate compensator. A reference comparator having a first input, a second input and an output is coupled to the input of the transistor control circuit. The first input can be coupled to the control terminal of the transistor, and the second input can be coupled to the output of the slew-rate compensator.

    SLEW-RATE COMPENSATED TRANSISTOR TURNOFF SYSTEM

    公开(公告)号:US20210126636A1

    公开(公告)日:2021-04-29

    申请号:US17078329

    申请日:2020-10-23

    Abstract: One example includes a circuit that includes a transistor control circuit having an input and an output adapted to be coupled to the output of the transistor control circuit and can provide a slew-rate compensation voltage proportional to a slew-rate of a control voltage of the transistor. A reference voltage source can be coupled to the slew-rate compensator to provide a reference voltage at the output of the reference voltage source, the slew-rate compensator configured to add the slew-rate compensation voltage to the reference voltage to provide an adjusted reference voltage at the output of the slew rate compensator. A reference comparator having a first input, a second input and an output is coupled to the input of the transistor control circuit. The first input can be coupled to the control terminal of the transistor, and the second input can be coupled to the output of the slew-rate compensator.

    METHODS, APPARATUS, AND SYSTEMS TO INCREASE COMMON-MODE TRANSIENT IMMUNITY IN ISOLATION DEVICES

    公开(公告)号:US20200099551A1

    公开(公告)日:2020-03-26

    申请号:US16425536

    申请日:2019-05-29

    Abstract: Methods, systems, and apparatus to increase common-mode transient immunity in isolation devices is disclosed. An example apparatus includes a current mirror including an input terminal and an output terminal; a transistor including a gate terminal, a first current terminal, and a second current terminal, the gate terminal coupled to a reference voltage terminal, the first current terminal coupled to the input terminal of the current mirror, and the second current terminal coupled to an input node; a buffer including an input terminal and an output terminal, the input terminal of the buffer coupled to the output terminal of the current mirror; and a logic gate including an input terminal and an output terminal, the input terminal of the logic gate coupled to the output terminal of the buffer.

Patent Agency Ranking