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公开(公告)号：US11201603B2
公开(公告)日：2021-12-14
申请号：US16905469
申请日：2020-06-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Pei-Hsin Liu , Richard Lee Valley , Bharath Balaji Kannan
Abstract: In some examples, a circuit includes an input circuit, an output circuit, an auxiliary circuit, and a balancing circuit. The input circuit comprises a primary capacitor coupled to primary windings of a transformer. The output circuit comprises a secondary capacitor coupled to secondary windings of the transformer, wherein the secondary windings are coupled to the primary windings. The auxiliary circuit comprises auxiliary windings coupled to the primary windings. The balancing circuit is coupled to the output circuit, the auxiliary circuit, and the input circuit. The balancing circuit is configured to balance a voltage across the primary capacitor with a voltage across the secondary capacitor.
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公开(公告)号：US20210021199A1
公开(公告)日：2021-01-21
申请号：US16928728
申请日：2020-07-14
Applicant: Texas Instruments Incorporated
Inventor： Pei-Hsin Liu , Cheng Liu
Abstract: A converter system (100) includes a transformer (102) having a primary side (104) and a secondary side (106), a first switch (114) with a first terminal (1151) coupled to the primary side (104) and a second terminal (1152) coupled to a voltage supply terminal, a second switch (116) coupled to the first terminal (1151) of the first switch (114), loop control circuitry (119), coupled to the secondary side (106), and configured to generate an offset signal based on an output voltage provided at the secondary side (106) and to generate a compensated signal by compensating the offset signal to a sensed signal being representative of a first current flowing through the primary side (104), and switch control circuitry (120), coupled to the loop control circuitry (119), and configured to operate the first and second switches (114, 116) based on the compensated signal.
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公开(公告)号：US10862397B2
公开(公告)日：2020-12-08
申请号：US16160697
申请日：2018-10-15
Applicant: Texas Instruments Incorporated
Inventor： Pei-Hsin Liu , Richard Lee Valley
Abstract: A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
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公开(公告)号：US10135341B1
公开(公告)日：2018-11-20
申请号：US15853205
申请日：2017-12-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Pei-Hsin Liu , Richard Lee Valley
Abstract: A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
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公开(公告)号：US20180287481A1
公开(公告)日：2018-10-04
申请号：US15944565
申请日：2018-04-03
Applicant: Texas Instruments Incorporated
Inventor： Pei-Hsin Liu , Richard Lee Valley
Abstract: An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L-H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H-L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.
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Patent Agency Ranking
公开(公告)号：US11509227B2
公开(公告)日：2022-11-22
申请号：US16928728
申请日：2020-07-14
Applicant: Texas Instruments Incorporated
Inventor： Pei-Hsin Liu , Cheng Liu
Abstract: A converter system (100) includes a transformer (102) having a primary side (104) and a secondary side (106), a first switch (114) with a first terminal (1151) coupled to the primary side (104) and a second terminal (1152) coupled to a voltage supply terminal, a second switch (116) coupled to the first terminal (1151) of the first switch (114), loop control circuitry (119), coupled to the secondary side (106), and configured to generate an offset signal based on an output voltage provided at the secondary side (106) and to generate a compensated signal by compensating the offset signal to a sensed signal being representative of a first current flowing through the primary side (104), and switch control circuitry (120), coupled to the loop control circuitry (119), and configured to operate the first and second switches (114, 116) based on the compensated signal.
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公开(公告)号：US20190165681A1
公开(公告)日：2019-05-30
申请号：US16160697
申请日：2018-10-15
Applicant: Texas Instruments Incorporated
Inventor： Pei-Hsin Liu , Richard Lee Valley
Abstract: A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
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公开(公告)号：US10778081B2
公开(公告)日：2020-09-15
申请号：US16183439
申请日：2018-11-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Pei-Hsin Liu
Abstract: A device includes a pulse generation circuit configured to cause a primary side of a flyback converter to generate a burst of pulses while a signal is enabled, a set-reset latch configured to output the signal and to reset in response to a number of pulses in the burst approaching a threshold, a comparator configured to set the set-reset latch when a compensated feedback voltage reaches a reference voltage, and a ripple compensation circuit configured to adjust a feedback voltage from a secondary side of the flyback converter by a compensation voltage to generate the compensated feedback voltage.
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公开(公告)号：US20200059152A1
公开(公告)日：2020-02-20
申请号：US16662681
申请日：2019-10-24
Applicant: Texas Instruments Incorporated
Inventor： Pei-Hsin Liu , Richard Lee Valley
Abstract: An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L−H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H−L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.
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公开(公告)号：US20190020277A1
公开(公告)日：2019-01-17
申请号：US15883896
申请日：2018-01-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Pei-Hsin Liu , Richard Lee Valley
Abstract: A power converter circuit includes a power stage comprising a transformer and a power switch. The power switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node having a switching voltage between the power switch and the primary winding. A switching controller includes a control transistor device to initiate an operational voltage associated with the control transistor device during a startup mode of the power converter circuit and to provide a control voltage based on an amplitude of the switching voltage during a normal operating mode. The switching controller generates the PWM signal in response to comparing the control voltage and a predetermined switching threshold voltage.
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