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公开(公告)号:US20140239409A1
公开(公告)日:2014-08-28
申请号:US14268493
申请日:2014-05-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Allan T. Mitchell , Mark A. Eskew , Keith Jarreau
IPC: H01L27/112
CPC classification number: H01L27/11206 , G11C17/16 , H01L27/11226 , H01L29/4983 , H01L29/861
Abstract: In an embodiment of the invention, a non-volatile anti-fuse memory cell is disclosed. The memory cell consists of a programmable n-channel diode-connectable transistor. The poly-silicon gate of the transistor has two portions. One portion is doped more highly than a second portion. The transistor also has a source with two portions where one portion of the source is doped more highly than a second portion. The portion of the gate that is physically closer to the source is more lightly doped than the other portion of the poly-silicon gate. The portion of the source that is physically closer to the lightly doped portion of the poly-silicone gate is lightly doped with respect to the other portion of the source. When the transistor is programmed, a rupture in the insulator will most likely occur in the portion of the poly-silicone gate that is heavily doped.
Abstract translation: 在本发明的实施例中,公开了一种非易失性反熔丝存储器单元。 存储单元由可编程的n沟道二极管连接晶体管组成。 晶体管的多晶硅栅极具有两部分。 一部分掺杂比第二部分更高。 晶体管还具有源的两部分,其中源的一部分被掺杂得比第二部分更高。 物理上更接近源极的栅极的部分比多晶硅栅极的其他部分更轻掺杂。 物理上更靠近聚硅氧烷栅极的轻掺杂部分的源的部分相对于源的另一部分被轻掺杂。 当晶体管被编程时,在重掺杂的聚硅氧烷栅极的部分中绝大多数情况下会发生破裂。
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公开(公告)号:US09257440B2
公开(公告)日:2016-02-09
申请号:US14268493
申请日:2014-05-02
Applicant: Texas Instruments Incorporated
Inventor: Allan T. Mitchell , Mark A. Eskew , Keith Jarreau
IPC: H01L27/112 , G11C17/16 , H01L29/49 , H01L29/861
CPC classification number: H01L27/11206 , G11C17/16 , H01L27/11226 , H01L29/4983 , H01L29/861
Abstract: In an embodiment of the invention, a non-volatile anti-fuse memory cell is disclosed. The memory cell consists of a programmable n-channel diode-connectable transistor. The poly-silicon gate of the transistor has two portions. One portion is doped more highly than a second portion. The transistor also has a source with two portions where one portion of the source is doped more highly than a second portion. The portion of the gate that is physically closer to the source is more lightly doped than the other portion of the poly-silicon gate. The portion of the source that is physically closer to the lightly doped portion of the poly-silicone gate is lightly doped with respect to the other portion of the source. When the transistor is programmed, a rupture in the insulator will most likely occur in the portion of the poly-silicone gate that is heavily doped.
Abstract translation: 在本发明的实施例中,公开了一种非易失性反熔丝存储器单元。 存储单元由可编程的n沟道二极管连接晶体管组成。 晶体管的多晶硅栅极具有两部分。 一部分掺杂比第二部分更高。 晶体管还具有源的两部分,其中源的一部分被掺杂得比第二部分更高。 物理上更接近源极的栅极的部分比多晶硅栅极的其他部分更轻掺杂。 物理上更靠近聚硅氧烷栅极的轻掺杂部分的源的部分相对于源的另一部分被轻掺杂。 当晶体管被编程时,在重掺杂的聚硅氧烷栅极的部分中绝大多数情况下会发生破裂。
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