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公开(公告)号:US20240214002A1
公开(公告)日:2024-06-27
申请号:US18086204
申请日:2022-12-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Vishal SHAW , Preetam Charan Anand TADEPARTHY , Mayank JAIN
CPC classification number: H03M1/822 , H03M1/0626 , H03M1/1205
Abstract: In an example, an apparatus includes a first decoder circuit having a first voltage identification (VID) analog input and a first digital output. The apparatus also includes a precharge circuit having a digital input and a first analog output, the digital input coupled to the first digital output. The apparatus also includes a second decoder circuit having a second VID analog input, a precharge analog input and a second digital output, the precharge analog input coupled to the first digital output. The apparatus also includes a multiplexer having a multiplexer output and first and second multiplexer inputs, the first multiplexer input coupled to the first digital output, and the second multiplexer input coupled to the second digital output.
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公开(公告)号:US20230378869A1
公开(公告)日:2023-11-23
申请号:US18229755
申请日:2023-08-03
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naman BAFNA , Preetam Charan Anand TADEPARTHY , Ammineni BALAJI , Sreelakshmi SURESH , Mayank JAIN
CPC classification number: H02M3/157 , H02M1/0845 , H02M1/0009
Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.
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公开(公告)号:US20220393588A1
公开(公告)日:2022-12-08
申请号:US17490671
申请日:2021-09-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naman BAFNA , Preetam Charan Anand TADEPARTHY , Ammineni BALAJI , Sreelakshmi SURESH , Mayank JAIN
Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.
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公开(公告)号:US20220209658A1
公开(公告)日:2022-06-30
申请号:US17138484
申请日:2020-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naman BAFNA , Muthusubramanian VENKATESWARAN , Mayank JAIN , Vikram GAKHAR , Vikas LAKHANPAL , Preetam Charan Anand TADEPARTHY , Pamidi RAMASIDDAIAH
Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.
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公开(公告)号:US20210119435A1
公开(公告)日:2021-04-22
申请号:US16658311
申请日:2019-10-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mayank JAIN , Preetam TADEPARTHY , Rohit NARULA , Shobhit SINGHAL
Abstract: An over/under voltage protection circuit includes a voltage input terminal, a digital-to analog converter, a comparator, and a control circuit. The comparator includes a first input coupled to an output of the digital-to-analog converter, and a second input coupled to the voltage input terminal. The control circuit includes an output coupled to an input of the digital-to-analog converter, and an input coupled to an output of the comparator. The control circuit is configured to set the digital-to-analog converter to generate an overvoltage fault threshold responsive to the output of the comparator indicating that voltage of a signal at the voltage input terminal exceeds a threshold currently generated by the digital-to-analog converter.
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