公开(公告)号：US10609477B1

公开(公告)日：2020-03-31

申请号：US16443897

申请日：2019-06-18

Applicant: Texas Instruments Incorporated

Inventor： Jasjot Singh Chadha ,  David Hernandez ,  Mukund Navada Kanyana ,  Rejin Kanjavalappil Raveendranath ,  Sahiti Priya C

IPC: H04R3/00 ,  H02M3/00 ,  H03F3/217 ,  H02M3/158

Abstract: A boosted audio amplifier system includes a first digital interpolation filter configured to oversample an audio input signal at a first oversampling rate and includes a signal level detector having an input coupled to receive the oversampled audio input signal and configured to produce an audio input level signal. The system further includes a programmable delay buffer having inputs coupled to receive the oversampled audio input signal and a first delay signal. The programmable delay buffer adds a first delay to the oversampled audio input signal to produce a delayed input signal. The system also includes a first processor having inputs coupled to receive a battery voltage level signal, the audio input level signal and the first delay signal. The first processor is configured to produce boost control signals to regulate a boost voltage.

公开(公告)号：US10331159B2

公开(公告)日：2019-06-25

申请号：US16027542

申请日：2018-07-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin Kanjavalappil Raveendranath

IPC: H02M1/36 ,  G05F5/00 ,  H02M3/157

Abstract: In some embodiments, a startup current limiter comprises a first comparator, a second comparator, on time circuitry coupled to an output of the second comparator, and a first logic structure coupled to the output of the second comparator and an output of the on time circuitry. In some embodiments, the startup current limiter further comprises sequencing logic coupled to an output of the first comparator, a latch coupled to an output of the first comparator at a set terminal of the latch and an output of the second comparator at a reset terminal of the latch, off time circuitry coupled to an output terminal of the latch, a second logic structure coupled to the latch and the off time circuitry, and a gate driver coupled to the second logic structure and an output of the sequencing logic.

公开(公告)号：US20240297583A1

公开(公告)日：2024-09-05

申请号：US18524239

申请日：2023-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin Kanjavalappil Raveendranath ,  Manojit Chakraborty

IPC: H02M3/157 ,  H02M1/14 ,  H03F3/183

CPC classification number: H02M3/157 ,  H02M1/14 ,  H03F3/183 ,  H03F2200/03 ,  H04R3/00

Abstract: A circuit including a digital-to-analog converter (DAC) having a first terminal and a second terminal. The circuit also includes a first diode having a first terminal coupled to the second terminal of the DAC and having a second terminal coupled to the first terminal of the DAC. A comparator has a first terminal and a second terminal. A second diode has a first terminal coupled to the second terminal of the DAC and has a second terminal coupled to the second terminal of the comparator. A voltage-to-current converter (V2I) has a terminal. A resistor has a first terminal coupled to the second terminal of the second diode and has a second terminal coupled to the terminal of the V2I converter.

公开(公告)号：US11011987B2

公开(公告)日：2021-05-18

申请号：US16575617

申请日：2019-09-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin Kanjavalappil Raveendranath ,  Aparna Girija

IPC: H02M3/158 ,  H02M1/12 ,  H02M1/00

Abstract: An apparatus includes a boost converter. The boost converter includes a switch and a boost loop filter coupled to the switch. The boost converter also includes a peak current adjustment circuit coupled to the boost loop filter, wherein the peak current adjustment circuit comprises a comparator and a gain control circuit coupled to differential inputs of the comparator. The boost loop filter is configured to provide a control signal to the switch based on an output voltage of the boost converter and a peak current adjustment provided by the peak current adjustment circuit.

公开(公告)号：US20240297581A1

公开(公告)日：2024-09-05

申请号：US18524005

申请日：2023-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manojit Chakraborty ,  Rejin Kanjavalappil Raveendranath

IPC: H02M3/155

CPC classification number: H02M3/155

Abstract: A circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. A first terminal of the second transistor is coupled to a control terminal of the first transistor. A second terminal of the second transistor is coupled to a second terminal of the first transistor. A first terminal of the third transistor is coupled to a voltage supply terminal. A second terminal of the third transistor and a first terminal of the fourth transistor are coupled to a control terminal of the second transistor. A second terminal of the fourth transistor is coupled to the second terminal of the second transistor. A first terminal of the fifth transistor is coupled to a first terminal of the first transistor. A second terminal of the fifth transistor is coupled to a control terminal of the fourth transistor.

公开(公告)号：US10291118B2

公开(公告)日：2019-05-14

申请号：US15847383

申请日：2017-12-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin Kanjavalappil Raveendranath ,  Sudhir Polarouthu ,  Jasjot Singh Chadha

IPC: H02M3/156 ,  H02M1/08 ,  H02M1/00

Abstract: A power supply, comprising a controller comprising a first switch coupled between a first node and a second node, a first resistor coupled between the second node and a third node, a second resistor coupled between the first node and a fourth node, a capacitor coupled between the fourth node and a fifth node, an amplifier coupled at a first input to the fourth node, at a second input to the third node, and at an output to the fifth node, and a comparator coupled at a first input to the fifth node and at a second input to the third node.