MULTIPLEXER CHARGE INJECTION REDUCTION
    1.
    发明申请
    MULTIPLEXER CHARGE INJECTION REDUCTION 审中-公开
    多路复用器充电注入减少

    公开(公告)号:US20170040990A1

    公开(公告)日:2017-02-09

    申请号:US15231350

    申请日:2016-08-08

    Abstract: A multiplexer comprises: a first switch; a second switch; a dummy component coupled to the first switch and the second switch and configured to: reduce a first charge injection of the first switch, and reduce a second charge injection of the second switch; and an output coupled to the first switch, the second switch, and the dummy component. A method comprises: providing an output from either a first switch or a second switch; coupling, by a dummy component, to the first switch and the second switch; using a BBM action; and reducing, by the dummy component, a first charge injection of the first switch or a second charge injection of the second switch.

    Abstract translation: 多路复用器包括:第一开关; 第二个开关 耦合到所述第一开关和所述第二开关的虚拟部件,其被配置为:减少所述第一开关的第一电荷注入,并且减少所述第二开关的第二电荷注入; 以及耦合到第一开关,第二开关和虚拟部件的输出。 一种方法包括:提供来自第一开关或第二开关的输出; 通过虚拟部件耦合到第一开关和第二开关; 使用BBM动作; 以及通过所述虚拟部件减小所述第一开关的第一电荷注入或所述第二开关的第二电荷注入。

    PRE-BIASED DUAL CURRENT SENSING
    2.
    发明公开

    公开(公告)号:US20230387908A1

    公开(公告)日:2023-11-30

    申请号:US17827406

    申请日:2022-05-27

    CPC classification number: H03K17/30 H03K2217/0063 H03K2217/0072

    Abstract: In an example, a system includes a first transistor and a second transistor, the first transistor and the second transistor configured to provide current to a load. The system also includes a sense transistor coupled to the first transistor, the sense transistor configured to sense a current flowing through the first transistor. The system includes an amplifier coupled to the sense transistor, where the amplifier includes a first input, a second input, and an output. The system also includes pre-bias circuitry coupled to the amplifier, where the pre-bias circuitry is configured to provide a voltage to the first input of the amplifier responsive to the first transistor being off, where the voltage biases the amplifier.

    INTERNAL DEVICE SEQUENCER FOR TESTING MODE

    公开(公告)号:US20230056957A1

    公开(公告)日:2023-02-23

    申请号:US17409633

    申请日:2021-08-23

    Abstract: A device includes FETs with control terminals. A gate driver circuit causes the FETs to turn on and to enter a high-impedance state in response to an OCP signal. A current sense circuit senses an FET current through the FETs and sends the OCP signal to the gate driver circuit when the FET current exceeds an OCP current for longer than an OCP deglitch period. A test sequencer, in response to receiving an external test mode signal, sets the OCP current to a preset OCP test current, sets the OCP deglitch period to a preset OCP deglitch test period, and causes the gate driver circuit to turn on the plurality of FETs.

    MULTIPLEXER CHARGE INJECTION REDUCTION
    4.
    发明申请

    公开(公告)号:US20200259492A1

    公开(公告)日:2020-08-13

    申请号:US16860736

    申请日:2020-04-28

    Abstract: A multiplexer comprises: a first switch; a second switch; a dummy component coupled to the first switch and the second switch and configured to: reduce a first charge injection of the first switch, and reduce a second charge injection of the second switch; and an output coupled to the first switch, the second switch, and the dummy component. A method comprises: providing an output from either a first switch or a second switch; coupling, by a dummy component, to the first switch and the second switch; using a BBM action; and reducing, by the dummy component, a first charge injection of the first switch or a second charge injection of the second switch.

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