LEADS FOR SEMICONDUCTOR PACKAGE
    1.
    发明申请

    公开(公告)号:US20210020549A1

    公开(公告)日:2021-01-21

    申请号:US16511313

    申请日:2019-07-15

    Abstract: A semiconductor package includes a first lead with first and second ends extending in the same direction as one another. At least one second lead has first and second ends and is partially surrounded by the first lead. A die pad is provided and a die is connected to the die pad. Wires electrically connect the die to the first lead and the at least one second lead. An insulating layer extends over the leads, the die pad, and the die such that the first end of the at least one second lead is exposed from the semiconductor package and the second end of the first lead is encapsulated entirely within the insulating layer.

    DIE PAD RECESSES
    2.
    发明申请

    公开(公告)号:US20230063262A1

    公开(公告)日:2023-03-02

    申请号:US17463124

    申请日:2021-08-31

    Abstract: In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.

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