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公开(公告)号:US20190206828A1
公开(公告)日:2019-07-04
申请号:US16025603
申请日:2018-07-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Honglin GUO , Jason CHIEN , Byron Lovell WILLIAMS , Jeffrey Alan WEST , Anderson LI , Arvin Nono VERDEFLOR
IPC: H01L23/00 , H01L21/56 , H01L23/495 , H01L23/31 , H01L25/065 , H01L25/00
CPC classification number: H01L24/49 , H01L21/565 , H01L23/3121 , H01L23/49575 , H01L24/45 , H01L24/85 , H01L25/0655 , H01L25/50 , H01L2224/45144 , H01L2224/45147 , H01L2224/45664 , H01L2224/48137 , H01L2224/48247 , H01L2224/49505 , H01L2224/85013 , H01L2224/85913 , H01L2924/1205
Abstract: An integrated circuit package and methods for packaging an integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first die and the palladium coated copper wires. The first die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.
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公开(公告)号:US20210020549A1
公开(公告)日:2021-01-21
申请号:US16511313
申请日:2019-07-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jason CHIEN , Yuh-Harng CHIEN , J K HO
IPC: H01L23/495 , H01L23/00 , H01L23/31 , H01L25/065
Abstract: A semiconductor package includes a first lead with first and second ends extending in the same direction as one another. At least one second lead has first and second ends and is partially surrounded by the first lead. A die pad is provided and a die is connected to the die pad. Wires electrically connect the die to the first lead and the at least one second lead. An insulating layer extends over the leads, the die pad, and the die such that the first end of the at least one second lead is exposed from the semiconductor package and the second end of the first lead is encapsulated entirely within the insulating layer.
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公开(公告)号:US20200251440A1
公开(公告)日:2020-08-06
申请号:US16854823
申请日:2020-04-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Honglin GUO , Jason CHIEN , Byron Lovell WILLIAMS , Jeffrey Alan WEST , Anderson LI , Arvin Nono VERDEFLOR
IPC: H01L23/00 , H01L25/00 , H01L25/065 , H01L23/31 , H01L23/495 , H01L21/56
Abstract: An integrated circuit and methods for packaging the integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first integrated circuit die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first integrated circuit die and the palladium coated copper wires. The first integrated circuit die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.
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