公开(公告)号：US20170200694A1

公开(公告)日：2017-07-13

申请号：US15427875

申请日：2017-02-08

Applicant: AUTOMATED ASSEMBLY CORPORATION

Inventor： Robert Neuman

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31

CPC classification number: H05K3/32 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3135 ,  H01L23/3157 ,  H01L23/4985 ,  H01L23/49883 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L33/486 ,  H01L33/54 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2224/45147 ,  H01L2224/48106 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/85201 ,  H01L2224/85423 ,  H01L2224/85447 ,  H01L2224/85801 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/1205 ,  H01L2924/1207 ,  H01L2924/1421 ,  H01L2933/005 ,  H01L2933/0066 ,  H05K1/189 ,  H05K3/284 ,  H05K3/321 ,  H05K3/3426 ,  H05K2201/0145 ,  H05K2201/0154 ,  H05K2201/10098 ,  H05K2201/10106 ,  H05K2203/049 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: A disclosed circuit arrangement includes a flexible substrate. A layer of pressure sensitive adhesive (PSA) is directly adhered to a first major surface of the substrate. One or more metal foil pads and electrically conductive wire are attached directly on a surface of the PSA layer. The wire has a round cross-section and one or more portions directly connected to the one or more metal foil pads with one or more weld joints, respectively. An electronic device is attached directly on the surface of the layer of PSA and is electrically connected to the one or more portions of the round wire by one or more bond wires, respectively.

公开(公告)号：US09502371B2

公开(公告)日：2016-11-22

申请号：US14413475

申请日：2013-07-01

Applicant: Kulicke and Soffa Industries, Inc.

Inventor： Thomas J. Colosimo, Jr. ,  Jon W. Brunner

IPC: H01L21/00 ,  H01L23/00

CPC classification number: H01L24/43 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/432 ,  H01L2224/45099 ,  H01L2224/451 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/4845 ,  H01L2224/48465 ,  H01L2224/78301 ,  H01L2224/78611 ,  H01L2224/78621 ,  H01L2224/85045 ,  H01L2224/851 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85365 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01049

Abstract: A method of forming a wire interconnect structure includes the steps of: (a) forming a wire bond at a bonding location on a substrate using a wire bonding tool; (b) extending a length of wire, continuous with the wire bond, to another location; (c) pressing a portion of the length of wire against the other location using the wire bonding tool; (d) moving the wire bonding tool, and the pressed portion of the length of wire, to a position above the wire bond; and (e) separating the length of wire from a wire supply at the pressed portion, thereby providing a wire interconnect structure bonded to the bonding location.

Abstract translation: 形成导线互连结构的方法包括以下步骤：（a）使用引线接合工具在基板上的接合位置处形成引线接合; （b）将与电线接合连续的电线长度延伸到另一位置; （c）使用所述电线焊接工具将所述电线长度的一部分压靠在另一位置; （d）将导线接合工具和电线长度的按压部分移动到线接合处的位置; 以及（e）将所述电线的长度从所述按压部分的电线供应部分开，从而提供接合到所述接合位置的电线互连结构。

公开(公告)号：US20150270229A1

公开(公告)日：2015-09-24

申请号：US14339029

申请日：2014-07-23

Applicant: SK hynix Inc.

Inventor： Tae Min KANG ,  Dae Woong LEE ,  Jong Hoon KIM

IPC: H01L23/00 ,  H01L23/58

CPC classification number: H01L23/562 ,  H01L21/304 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/585 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13009 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48111 ,  H01L2224/49176 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81903 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2924/00012

Abstract: A semiconductor chip includes a semiconductor substrate having a front surface, a circuit unit formed within the semiconductor substrate and extending from the front surface into the semiconductor substrate, and a rear surface opposite the front surface, and a girder beam disposed outside of the circuit unit and within the semiconductor substrate.

Abstract translation: 半导体芯片包括具有前表面的半导体衬底，形成在半导体衬底内并从前表面延伸到半导体衬底中的电路单元，以及与前表面相对的后表面，以及设置在电路单元外侧的大梁 并在半导体衬底内。

公开(公告)号：US20150194397A1

公开(公告)日：2015-07-09

申请号：US14657789

申请日：2015-03-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shin-Puu Jeng ,  Hsien-Wei Chen ,  Hao-Yi Tsai ,  Yu-Wen Liu

IPC: H01L23/00

CPC classification number: H01L24/03 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/37001 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of forming a bond pad structure is provided. The method includes forming a first conductive layer over a substrate and depositing a first dielectric layer over the first conductive layer. The first dielectric layer is patterned to form a contiguous planar path substantially parallel to a top surface of the substrate. Patterning the first dielectric layer includes defining a dielectric region of the first dielectric layer surrounded by a portion of the contiguous planar path, and forming a first via hole in the dielectric region. The contiguous planar path and the via hole are filled with a conductive material. The conductive material in the contiguous planar path forms a second conductive layer, and the contiguous planar path extends from a first lateral side wall of the second conductive layer to a second lateral sidewall of the second conductive layer. A bond pad is formed over the second conductive layer, and the bond pad is electrically connected to the second conductive layer.

Abstract translation: 提供一种形成接合焊盘结构的方法。 该方法包括在衬底上形成第一导电层并在第一导电层上沉积第一介电层。 图案化第一电介质层以形成基本上平行于衬底的顶表面的邻接平面路径。 对第一电介质层进行图案化包括限定由邻接平面路径的一部分包围的第一介电层的电介质区域，以及在电介质区域中形成第一通孔。 邻接的平面路径和通孔填充有导电材料。 邻接平面路径中的导电材料形成第二导电层，并且邻接的平面路径从第二导电层的第一横向侧壁延伸到第二导电层的第二横向侧壁。 在第二导电层上形成接合焊盘，并且接合焊盘与第二导电层电连接。

公开(公告)号：US09055700B2

公开(公告)日：2015-06-09

申请号：US13059602

申请日：2009-08-11

Applicant: Mark Robson Humphries ,  Frank Ferdinandi ,  Rodney Edward Smith

Inventor： Mark Robson Humphries ,  Frank Ferdinandi ,  Rodney Edward Smith

IPC: H05K1/03 ,  H05K3/28 ,  H01L23/00 ,  H01H13/78 ,  H05K3/22 ,  H05K3/32

CPC classification number: H05K3/282 ,  H01H13/78 ,  H01H2215/004 ,  H01H2229/012 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/06 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45105 ,  H01L2224/45109 ,  H01L2224/45111 ,  H01L2224/45113 ,  H01L2224/45116 ,  H01L2224/4512 ,  H01L2224/45124 ,  H01L2224/45138 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45149 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/4516 ,  H01L2224/45164 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/4517 ,  H01L2224/45171 ,  H01L2224/45173 ,  H01L2224/45178 ,  H01L2224/4518 ,  H01L2224/45184 ,  H01L2224/45565 ,  H01L2224/45599 ,  H01L2224/45644 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/48464 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/8502 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85484 ,  H01L2224/85611 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/3011 ,  H05K3/222 ,  H05K3/284 ,  H05K3/328 ,  H05K2201/015 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2203/049 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/20758

Abstract: In some embodiments, a printed circuit board (PCB) comprises a substrate comprising an insulating material. The PCB further comprises a plurality of conductive tracks attached to at least one surface of the substrate. The PCB further comprises a multi-layer coating deposited on the at least one surface of the substrate. The multi-layer coating (i) covers at least a portion of the plurality of conductive tracks and (ii) comprises at least one layer formed of a halo-hydrocarbon polymer. The PCB further comprises at least one electrical component connected by a solder joint to at least one conductive track, wherein the solder joint is soldered through the multi-layer coating such that the solder joint abuts the multi-layer coating.

Abstract translation: 在一些实施例中，印刷电路板（PCB）包括包含绝缘材料的基板。 PCB还包括附接到基板的至少一个表面的多个导电轨迹。 PCB还包括沉积在衬底的至少一个表面上的多层涂层。 多层涂层（i）覆盖多个导电轨道的至少一部分，（ii）包括由卤代烃聚合物形成的至少一层。 PCB还包括至少一个通过焊接接头连接到至少一个导电轨道的电气部件，其中焊接接头通过多层涂层焊接，使得焊接接头邻接多层涂层。

公开(公告)号：US20140038406A1

公开(公告)日：2014-02-06

申请号：US14050535

申请日：2013-10-10

Applicant: Micron Technology, Inc.

Inventor： David R Hembree ,  Alan G. Wood

IPC: H01L21/768

CPC classification number: H01L24/16 ,  G01R1/06716 ,  G01R1/07307 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02125 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/02335 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0333 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45116 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/45684 ,  H01L2224/45698 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10155 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45164 ,  H01L2924/013 ,  H01L2924/00013

Abstract: A method for fabricating a through wire interconnect for a semiconductor substrate having a substrate contact includes the steps of: forming a via through the semiconductor substrate from a first side to a second side thereof; placing a wire in the via having a first end with a bonded connection to the substrate contact and a second end proximate to the second side; forming a first contact on the wire proximate to the first side; forming a second contact on the second end of the wire; and forming a polymer layer on the first side at least partially encapsulating the wire while leaving the first contact exposed.

Abstract translation: 一种用于制造具有衬底接触的半导体衬底的通孔布线的方法包括以下步骤：从第一侧至第二侧从半导体衬底形成通孔; 将导线放置在所述通孔中，所述通孔具有第一端，所述第一端具有与所述基板接触件的接合连接和靠近所述第二侧的第二端; 在靠近第一侧的导线上形成第一触点; 在所述电线的第二端上形成第二触点; 以及在所述第一侧上形成聚合物层，至少部分地包封所述导线，同时使所述第一接触体露出。

公开(公告)号：US20130328197A1

公开(公告)日：2013-12-12

申请号：US13966320

申请日：2013-08-14

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Matthias Stecher

IPC: H01L23/532

CPC classification number: H01L24/48 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/0347 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/73257 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/2075 ,  H01L2924/00012 ,  H01L2924/01006

Abstract: An electronic device and method for production is disclosed. One embodiment provides an integrated component having a first layer which is composed of copper or a copper alloy or which contains copper or a copper alloy, and having an electrically conductive second layer, whose material differs from the material of the first layer, and a connection apparatus which is arranged on the first layer and on the second layer.

Abstract translation: 公开了一种用于生产的电子设备和方法。 一个实施例提供了一种集成部件，其具有由铜或铜合金构成的第一层或者包含铜或铜合金的第一层，并且具有导电的第二层，其材料与第一层的材料不同， 设置在第一层和第二层上。

公开(公告)号：US08604627B2

公开(公告)日：2013-12-10

申请号：US11918407

申请日：2006-04-14

Applicant: Hideki Hiromoto ,  Sadamasa Fujii ,  Tsunemori Yamaguchi

Inventor： Hideki Hiromoto ,  Sadamasa Fujii ,  Tsunemori Yamaguchi

IPC: H01L23/49

CPC classification number: H01L24/85 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49517 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/4554 ,  H01L2224/45669 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/48475 ,  H01L2224/4848 ,  H01L2224/48997 ,  H01L2224/4911 ,  H01L2224/49429 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/48455 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: The present invention aims at providing a semiconductor device capable of reliably preventing a wire bonded to an island from being disconnected due to a thermal shock, a temperature cycle and the like in mounting and capable of preventing remarkable increase in the process time. In the semiconductor device according to the present invention, a semiconductor chip is die-bonded to the surface of an island, one end of a first wire is wire-bonded to an electrode formed on the surface of the semiconductor chip to form a first bonding section and the other end of the first wire is wire-bonded to the island to form a second bonding section, while the semiconductor device is resin-sealed. A double bonding section formed by wire-bonding a second wire is provided on the second bonding section of the first wire wire-bonded onto the island.

Abstract translation: 本发明的目的在于提供一种能够可靠地防止由于安装时的热冲击，温度循环等而使与岛部接合的引线断线的半导体装置，能够防止显着增加处理时间。 在根据本发明的半导体器件中，半导体芯片被芯片接合到岛的表面，第一线的一端被引线接合到形成在半导体芯片的表面上的电极，以形成第一接合 并且第一线的另一端被引线接合到岛以形成第二接合部，同时半导体器件被树脂密封。 在第一导线接合到岛上的第二接合部上设置有通过引线接合第二线形成的双接合部。

公开(公告)号：US08581387B1

公开(公告)日：2013-11-12

申请号：US13771440

申请日：2013-02-20

Applicant: Micron Technology, Inc.

Inventor： David R. Hembree ,  Alan G. Wood

IPC: H01L23/04

CPC classification number: H01L24/16 ,  G01R1/06716 ,  G01R1/07307 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02125 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/02335 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0333 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45116 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/45684 ,  H01L2224/45698 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10155 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45164 ,  H01L2924/013 ,  H01L2924/00013

Abstract: A through wire interconnect for a semiconductor substrate includes a via extending through the semiconductor substrate from a first side to a second side thereof, and a wire in the via electrically insulated from the semiconductor substrate having a first end with a bonded connection to the substrate contact and a second end proximate to the second side of the semiconductor substrate. The through wire interconnect also includes a first contact on the wire proximate to the first side of the semiconductor substrate, a second contact on the second end of the wire, and a polymer layer on the first side at least partially encapsulating the wire while leaving the first contact exposed. The through wire interconnect can also include a bonding member bonded to the first end of the wire and to the substrate contact having a tip portion forming the first contact.

Abstract translation: 用于半导体衬底的通线互连包括从第一侧延伸穿过半导体衬底到第二侧的通孔以及与半导体衬底电绝缘的通孔中的导线，该第一端具有与衬底接触的接合连接 以及靠近半导体衬底的第二侧的第二端。 通线互连还包括靠近半导体衬底的第一侧的导线上的第一接触件，线的第二端上的第二接触件和第一侧上的至少部分地封装电线的聚合物层，同时留下 第一接触暴露。 通线互连还可以包括接合到线的第一端的接合构件和具有形成第一接触的尖端部分的衬底接触。

公开(公告)号：US08471392B2

公开(公告)日：2013-06-25

申请号：US13024373

申请日：2011-02-10

Applicant: Kazuaki Kojima

Inventor： Kazuaki Kojima

IPC: H01L23/495

CPC classification number: H04N7/183 ,  A61B1/05 ,  H01L23/4985 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48472 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An image pickup apparatus according to an embodiment includes: an image pickup device chip including an image pickup device formed on a first principal surface thereof and an external terminal for the image pickup device formed on a second principal surface thereof; a wiring board including a distal end portion including a connection pad, a flexure portion flexed at an angle of no less than 90 degrees, and an extending portion, the wiring board including a wiring layer extending from the distal end portion to the extending portion via the flexure portion, the wiring board being kept within a space immediately above the second principal surface of the image pickup device chip; a bonding layer that joins the second principal surface of the image pickup device chip and the distal end portion of the wiring board; and a bonding wire that electrically connects the external terminal and the connection pad.

Abstract translation: 根据实施例的图像拾取装置包括：图像拾取装置芯片，包括形成在其第一主表面上的图像拾取装置和形成在其第二主表面上的用于图像拾取装置的外部端子; 布线基板，包括：包括连接焊盘的远端部分，弯曲角度不小于90度的挠曲部分和延伸部分，所述布线板包括从所述远端部分延伸到所述延伸部分的布线层 挠曲部分，布线板保持在图像拾取装置芯片的第二主表面之上的空间内; 连接图像拾取器件芯片的第二主表面和布线板的远端部分的接合层; 以及将外部端子和连接焊盘电连接的接合线。