公开(公告)号：US20240013083A1

公开(公告)日：2024-01-11

申请号：US17862173

申请日：2022-07-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Der CHIH ,  Chun-Yen YAO

IPC: G06N10/40 ,  G06N10/60 ,  H03K19/21 ,  G11C7/12

CPC classification number: G06N10/40 ,  G06N10/60 ,  H03K19/21 ,  G11C7/12

Abstract: An annealing processor utilizes capacitive spin update circuits to generate values for determining if spin states should be updated. Each capacitive spin update circuit induces a voltage on a main capacitor via capacitive coupling with a plurality of capacitors of corresponding bit cells. Each bit cell receives a spin value and a spin coupling value. The induced charge is based, in part, on the spin values and spin coupling values.