Setting of Reference Voltage for Data Sensing in Ferroelectric Memories
    2.
    发明申请
    Setting of Reference Voltage for Data Sensing in Ferroelectric Memories 有权
    铁电存储器中数据传感参考电压的设定

    公开(公告)号:US20160240238A1

    公开(公告)日:2016-08-18

    申请号:US15019026

    申请日:2016-02-09

    Abstract: A method of setting the reference voltage for sensing data states in integrated circuits including ferroelectric random access memory (FRAM) cells of the one-transistor-one capacitor (1T-1C) type. In an electrical test operation, some or all of the FRAM cells are programmed to a particular polarization state. A “shmoo” of the reference voltage for sensing the data state is performed, at one or more worst case electrical or environmental conditions for that data state, to determine a reference voltage limit at which the weakest cell fails to return the correct data when read. A configuration register is then written with a reference voltage based on this reference voltage limit, for example at the limit plus/minus a tolerance.

    Abstract translation: 一种用于在包括单晶体管一电容器(1T-1C)类型的铁电随机存取存储器(FRAM)单元的集成电路中设置用于感测数据状态的参考电压的方法。 在电测试操作中,部分或全部FRAM单元被编程为特定的偏振状态。 在用于该数据状态的一个或多个最坏情况的电气或环境条件下执行用于感测数据状态的参考电压的“shmoo”,以确定在读取时最弱单元不能返回正确数据的参考电压极限 。 然后,基于该参考电压限制,以参考电压写入配置寄存器,例如在极限加上/减去公差。

    Setting of reference voltage for data sensing in ferroelectric memories

    公开(公告)号:US10573367B2

    公开(公告)日:2020-02-25

    申请号:US15678357

    申请日:2017-08-16

    Abstract: Disclosed embodiments include a testing system that electrically connects to an integrated circuit (IC) having ferroelectric memory (FRAM) cells. The testing system programs the FRAM cells to a first data state and then iteratively reads the programmed cells at a plurality of reference voltages to identify a reference voltage limit that indicates a first occurrence at which at least one of the cells fails to return the first data state when read. Iteratively reading the cells includes reading each cell at an initial reference voltage at which all the cells return the first data state, and then reading each of the programmed cells at each of the remaining reference voltages by incrementally changing the initial reference voltage in one direction until the reference voltage limit is identified. The testing system sets the reference in the IC at an operating level based on the reference voltage limit.

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