公开(公告)号：US6028803A

公开(公告)日：2000-02-22

申请号：US180665

申请日：1998-11-12

申请人： Thomas Kopley ,  Werner Weber ,  Roland Thewes

发明人： Thomas Kopley ,  Werner Weber ,  Roland Thewes

IPC分类号： G11C11/409 ,  G11C11/4091 ,  G11C7/02

CPC分类号： G11C11/4091

摘要： In the read amplifier a mismatch of the inception voltages of cross-coupled transistors (M5, M6) of the read amplifier are compensated by four further transistors (M1 . . . M4), whereby a defined equalizing of the bitlines advantageously takes place with these further transistors simultaneously in what is called the equalize phase. The compensation takes place in that the bitline that is connected with the transistor with the lower inception voltage is charged to a higher level in the pre-load phase. This higher bitline level is switched to the gate of the transistor connected with the other bitline. In the evaluation phase the transistor with the higher inception voltage becomes more strongly conductive. Read amplifiers of this sort are most significant for memory generations beginning at 1 Gbit, since the mismatch due to the variation of the input voltages of the transistors can no longer usefully be solved by a correspondingly large gate surface of the cross-coupled transistors in the read amplifier.

摘要翻译： PCT No.PCT / DE97 / 01027 Sec。 371日期：1998年11月12日 102（e）日期1998年11月12日PCT 1997年5月21日PCT PCT。 出版物WO97 / 47010 日期1997年12月11日在读取放大器中，读取放大器的交叉耦合晶体管（M5，M6）的初始电压不匹配由四个另外的晶体管（M1 ... M4）补偿，由此定义的均衡位线 有利地与这些另外的晶体管同时进行所谓的均衡相。 补偿发生在与初始电压较低的晶体管连接的位线在预加载阶段被充电到更高的电平。 该较高的位线电平切换到与另一个位线连接的晶体管的栅极。 在评估阶段，具有较高初始电压的晶体管变得更强导电。 这种读取放大器对于从1G位开始的存储器代数来说是最重要的，因为由于晶体管的输入电压的变化引起的失配不再有用地被解决了由交叉耦合晶体管的相应大的栅极表面 读取放大器。

公开(公告)号：US20050149661A1

公开(公告)日：2005-07-07

申请号：US10750518

申请日：2003-12-31

申请人： Kenneth Poulton ,  Thomas Kopley

发明人： Kenneth Poulton ,  Thomas Kopley

IPC分类号： G11C5/00 ,  H03M1/06 ,  H03M1/12

CPC分类号： H03M1/06 ,  H03M1/12

摘要： The present method reduces variations in noise and temperature in a mixed-signal circuit including memory. Memory electrically proximate an analog circuit is provided and a digital data word received at the memory. When the data word is not a desired data word, a dummy write to the memory is performed. When the data word is a desired data word, the data word is written to the memory. The mixed-signal circuit includes an analog circuit, memory electrically proximate to the analog circuit and connected to receive digital data words, and a memory controller connected to the memory. The memory controller is operable to cause the memory to write to the memory each of the data words that is a desired data word and additionally to perform a dummy write to memory for each of the data words that is not a desired data word.

摘要翻译： 本方法减少包括存储器在内的混合信号电路中的噪声和温度变化。 提供电接近模拟电路的存储器和在存储器处接收的数字数据字。 当数据字不是期望的数据字时，执行对存储器的虚拟写入。 当数据字是期望的数据字时，数据字被写入存储器。 混合信号电路包括模拟电路，电气地靠近模拟电路并被连接以接收数字数据字的存储器以及连接到存储器的存储器控​​制器。 存储器控制器可操作以使存储器向存储器写入作为期望数据字的每个数据字，并且另外对于不是期望数据字的每个数据字执行对存储器的虚拟写入。

公开(公告)号：US20060060863A1

公开(公告)日：2006-03-23

申请号：US10946753

申请日：2004-09-22

申请人： Jennifer Lu ,  Nicolas Moll ,  Thomas Kopley

发明人： Jennifer Lu ,  Nicolas Moll ,  Thomas Kopley

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： C23C16/04 ,  B82Y10/00 ,  H01L51/0048

摘要： Systems and methods are provided for controllably growing nanostructures, such as nanotubes, on a substrate, thus enabling the length and/or orientation of the nanostructures to be selectively controlled. A substrate's surface is selectively patterned to include topological structures, such as a blocking structure protruding from the surface and/or a recess in the surface, for influencing the nanostructure growth along the surface from a catalyst. The topological structures can be located to control the length and/or orientation of the nanostructures differently on different areas of the substrate. The topological structures may be of a substance that chemically inhibits growth of the nanostructure.

摘要翻译： 提供了系统和方法用于在衬底上可控地生长纳米结构，例如纳米管，从而使纳米结构的长度和/或取向被选择性地控制。 衬底的表面被选择性地图案化以包括拓扑结构，例如从表面突出的阻挡结构和/或表面中的凹部，用于影响来自催化剂的表面的纳米结构生长。 可以定位拓扑结构以在衬底的不同区域上不同地控制纳米结构的长度和/或取向。 拓扑结构可以是化学抑制纳米结构生长的物质。

公开(公告)号：US20060084570A1

公开(公告)日：2006-04-20

申请号：US11035595

申请日：2005-01-14

申请人： Thomas Kopley ,  Jennifer Lu ,  Nicolas Moll ,  Sungsoo Yi

发明人： Thomas Kopley ,  Jennifer Lu ,  Nicolas Moll ,  Sungsoo Yi

IPC分类号： B01J21/04

CPC分类号： B82Y40/00 ,  B01J23/74 ,  B01J35/0013 ,  C01B32/162

摘要： Systems and methods are provided for limiting the growth of nanostructures, such as nanotubes, from a catalyst layer. More particularly, systems and methods are provided for growing nanostructures from the periphery of a catalyst layer. In certain embodiments, a catalyst layer from which nanostructures can be grown during a growth process, such as CVD or PECVD, is located on a substrate. The catalyst layer is covered with a covering layer such that the catalyst layer is sandwiched between the substrate and the covering layer. The resulting structure then undergoes a nanostructure growth process. Because the catalyst layer is sandwiched between the substrate and the covering layer, growth of nanostructures is limited to growth from nanoparticles located on the periphery of the catalyst layer. Thus, growth of nanostructures does not result from nanoparticles located in an interior region of the catalyst layer.

摘要翻译： 提供了系统和方法，用于从催化剂层限制纳米结构如纳米管的生长。 更具体地，提供了用于从催化剂层的周边生长纳米结构的系统和方法。 在某些实施方案中，在生长过程（例如CVD或PECVD）中可以从其中生长纳米结构的催化剂层位于基底上。 催化剂层被覆盖层覆盖，使得催化剂层夹在基板和覆盖层之间。 所得结构然后经历纳米结构生长过程。 由于催化剂层夹在基材和覆盖层之间，纳米结构的生长被限制在从位于催化剂层周边的纳米颗粒生长。 因此，纳米结构的生长不是由位于催化剂层的内部区域中的纳米颗粒产生的。