摘要:
A driving method is applied to a solid-state imaging apparatus having photoelectric conversion portions, transfer portion for reading out signal charges, and an excess charge draining portion for draining charges exceeding a saturation charge amount that is set by a reference voltage. One of driving modes is selected from a full pixel mode in which accumulated signal charges are detected individually for each pixel and a pixel mixing mode in which signal charges of a predetermined number of pixels are mixed to be detected. In the full pixel mode, the draining portion is supplied with the reference voltage having the same value during a charge accumulation period and a read transfer period for read transferring charges. In the pixel mixing mode, the draining portion is supplied with the reference voltage having a low level during the charge accumulation period and the reference voltage having a high level during the read transfer period. An appropriate driving for the pixel mixing mode can be performed by avoiding a limitation of a substrate voltage, without deteriorating the spectral characteristics, the sensitivity, nor the linearity.
摘要:
A driving method is applied to a solid-state imaging apparatus having photoelectric conversion portions, transfer portion for reading out signal charges, and an excess charge draining portion for draining charges exceeding a saturation charge amount that is set by a reference voltage. One of driving modes is selected from a full pixel mode in which accumulated signal charges are detected individually for each pixel and a pixel mixing mode in which signal charges of a predetermined number of pixels are mixed to be detected. In the full pixel mode, the draining portion is supplied with the reference voltage having the same value during a charge accumulation period and a read transfer period for read transferring charges. In the pixel mixing mode, the draining portion is supplied with the reference voltage having a low level during the charge accumulation period and the reference voltage having a high level during the read transfer period. An appropriate driving for the pixel mixing mode can be performed by avoiding a limitation of a substrate voltage, without deteriorating the spectral characteristics, the sensitivity, nor the linearity.
摘要:
A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets an accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).
摘要:
A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets al accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).
摘要:
The present invention provides a solid-state image sensing device that can reduce at least the number of pixels arranged in the horizontal direction and can output high quality picture signals at high speed without generating moire or alias. The solid-state image sensing device includes vertical transfer parts 3 in which signal charges read out from photoelectric conversion parts 2 arranged bidimensionally are transferred in the vertical direction stage by stage, a horizontal transfer part 4 in which signal charges received from the vertical transfer parts 3 are transferred in the horizontal direction, and a control unit that controls transfer operations of the vertical transfer parts 3 and horizontal transfer part 4, wherein vertical last stages of the vertical transfer parts 3 have transfer electrodes formed to have identical configurations repeated every 2n+1 (n denotes an integer of 1 or higher) columns, and vertical last stages of columns other than one column among the 2n+1 columns or all vertical stages are provided with transfer electrodes that are independent of those of the other vertical last stages.
摘要:
A solid-state imaging device, and a camera provided with this device, that can output high quality images at high speed are realized by preventing improper OB clamping in a solid-state imaging device that performs pixel mixing in the horizontal direction. Vertical final stages, which are the transfer stages closest to a horizontal transfer component 4, are provided with provided with independent transfer electrodes V3-1, V3-2, V3-3, V6-1, V5-2, and V5-3 that are independent of other columns in a region between the horizontal transfer component and an effective pixel region, and a common transfer electrode that is common to all of the columns in the region between the horizontal transfer component 4 and the OB region. Further, in the vertical final stages, the entire region between the OB region and the horizontal transfer component, or the region minus openings formed for the wiring of V3-1 and V5-1 in the columns closest to the effective pixel region, is covered with a light blocking film.
摘要:
A solid-state imaging device, and a camera provided with this device, that can output high quality images at high speed are realized by preventing improper OB clamping in a solid-state imaging device that performs pixel mixing in the horizontal direction. Vertical final stages, which are the transfer stages closest to a horizontal transfer component 4, are provided with provided with independent transfer electrodes V3-1, V3-2, V3-3, V6-1, V5-2, and V5-3 that are independent of other columns in a region between the horizontal transfer component and an effective pixel region, and a common transfer electrode that is common to all of the columns in the region between the horizontal transfer component 4 and the OB region. Further, in the vertical final stages, the entire region between the OB region and the horizontal transfer component, or the region minus openings formed for the wiring of V3-1 and V5-1 in the columns closest to the effective pixel region, is covered with a light blocking film.
摘要:
The semiconductor element according to an aspect of the present invention is a solid-state imaging element formed on a semiconductor substrate, having an overflow drain structure for draining excessive charges generated in photoelectric conversion elements, and reading out signal charges accumulated in the photoelectric conversion elements to a vertical transfer unit via a readout gate electrode. The solid-state imaging element includes: a first voltage generating circuit which applies, to the semiconductor substrate, substrate voltage defining the height of overflow barrier in the overflow drain structure; and a second voltage generating circuit which selectively generates first voltage and second voltage each including the height of pulse wave superimposed onto the substrate voltage, at a time when readout pulse to be applied to the readout gate electrode is generated.
摘要:
A timing generator, includes: a first memory circuit that stores timing generation information; a first register for holding the timing generation information in the first memory circuit; a first external input part for accessing to the first register so as to rewrite data therein; a selector that selects one of the first memory circuit and the first external input part in order to conduct writing of data in the first register; and a pulse generation part that generates a pulse timing in accordance with the timing generation information held in the first register so as to output a single or a plurality of pulses. A pulse timing required for driving a solid-state imaging device and the like can be generated easily and the timing generation can be rewritten externally.
摘要:
A timing generator, includes: a first memory circuit that stores timing generation information; a first register for holding the timing generation information in the first memory circuit; a first external input part for accessing to the first register so as to rewrite data therein; a selector that selects one of the first memory circuit and the first external input part in order to conduct writing of data in the first register; and a pulse generation part that generates a pulse timing in accordance with the timing generation information held in the first register so as to output a single or a plurality of pulses. A pulse timing required for driving a solid-state imaging device and the like can be generated easily and the timing generation can be rewritten externally.