Top gate thin-film transistor and method of producing the same
    1.
    发明申请
    Top gate thin-film transistor and method of producing the same 失效
    顶栅薄膜晶体管及其制造方法

    公开(公告)号:US20010026962A1

    公开(公告)日:2001-10-04

    申请号:US09754180

    申请日:2001-01-03

    CPC classification number: H01L29/66757 H01L29/4908 H01L29/78618

    Abstract: A method of producing a top gate thin-film transistor in which an insulated gate structure (14) is formed over an amorphous silicon layer with upper gate conductor (16) directly over the gate insulator layers. The gate conductor is patterned to be narrower than a spacing to be provided between source and drain electrode contacts. Laser annealing of areas of the amorphous silicon layer (12) not shielded by the gate conductor (16) is carried out to form polysilicon portions. The gate insulator layers are formed as a gate insulator layer (14a,14b) of first refractive index, and an overlying surface insulator layer (14c) of second, lower, refractive index. The overlying surface insulator layer has been found to reduce fluctuations in the reflectance of the structure in dependence upon the specific thicknesses of the gate insulator layers. Therefore, the tolerances for the thicknesses of the gate insulator layers can be reduced whilst maintaining control of the laser annealing process.

    Abstract translation: 一种制造顶栅极薄膜晶体管的方法,其中绝缘栅极结构(14)形成在非晶硅层上,上层栅极导体(16)直接位于栅极绝缘体层上。 栅极导体被图案化成比在源极和漏极电极触点之间提供的间隔窄。 进行未被栅极导体(16)屏蔽的非晶硅层(12)的区域的激光退火,以形成多晶硅部分。 栅极绝缘体层形成为具有第一折射率的栅极绝缘体层(14a,14b)和第二,较低折射率的上覆表面绝缘体层(14c)。 已经发现覆盖表面绝缘体层根据栅极绝缘体层的特定厚度减小结构的反射率的波动。 因此,可以减小栅极绝缘体层的厚度的公差,同时保持激光退火过程的控制。

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