公开(公告)号：US20210336133A1

公开(公告)日：2021-10-28

申请号：US17371376

申请日：2021-07-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jen WANG ,  Chun-Hung CHENG ,  Chuan-Fu WANG

IPC: H01L45/00 ,  H01L27/24

Abstract: A method for forming a resistive random access memory structure. The resistive random access memory structure includes a bottom electrode; a variable resistance layer disposed on the bottom electrode; a top electrode disposed on the variable resistance layer; a protection layer surrounding the variable resistance layer, wherein a top surface of the protection layer and a top surface of the top electrode are coplanar; and an upper interconnect structure disposed on the top electrode, wherein the upper interconnect structure is electrically connected to the top electrode and directly contacts a sidewall of the protection layer.

公开(公告)号：US20210013403A1

公开(公告)日：2021-01-14

申请号：US16504491

申请日：2019-07-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jen WANG ,  Chun-Hung CHENG ,  Chuan-Fu WANG

IPC: H01L45/00 ,  H01L27/24

Abstract: A resistive random access memory structure includes a bottom electrode; a variable resistance layer disposed on the bottom electrode; a top electrode disposed on the variable resistance layer; a protection layer surrounding the variable resistance layer, wherein a top surface of the protection layer and a top surface of the top electrode are coplanar; and an upper interconnect structure disposed on the top electrode, wherein the upper interconnect structure is electrically connected to the top electrode and directly contacts a sidewall of the protection layer.

公开(公告)号：US20230337556A1

公开(公告)日：2023-10-19

申请号：US17747000

申请日：2022-05-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shu-Hung YU ,  Chun-Hung CHENG ,  Chuan-Fu WANG

IPC: H01L45/00

CPC classification number: H01L45/1226 ,  H01L45/1633 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1253

Abstract: A resistive memory device is provided. The resistive memory device includes a first electrode, a memory structure on the first electrode, and a second electrode on the memory structure. The memory structure includes a tubular element and a pillar element. The tubular element includes oxide. The pillar element includes oxide. The pillar element is surrounded by the tubular element. The tubular element and the pillar element include different materials.

公开(公告)号：US20230057572A1

公开(公告)日：2023-02-23

申请号：US17489829

申请日：2021-09-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shu-Hung YU ,  Chun-Hung CHENG ,  Chuan-Fu WANG

IPC: H01L45/00 ,  H01L27/24

Abstract: A ReRAM device includes a dielectric layer, a bottom electrode, a data storage layer, a metal covering layer, and a top electrode. The dielectric layer has a recess. At least a portion of the bottom electrode is exposed through the recess. The data storage layer is disposed on a sidewall and a bottom surface of the recess, electrically contacts with the bottom electrode, and has a top portion lower than an opening of the recess. The metal covering layer blanket covers the data storage layer, has an extension portion covering the top portion, and connects to the sidewall of the recess. The top electrode is disposed in the recess, and is electrically contact with the metal covering layer.