公开(公告)号：US20170338351A1

公开(公告)日：2017-11-23

申请号：US15191542

申请日：2016-06-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： ZHIBIAO ZHOU ,  Ding-Lung Chen ,  Chen-Bin Lin ,  SANPO WANG ,  Chung-Yuan Lee ,  Chi-Fa Ku

IPC: H01L29/786 ,  H01L29/788 ,  H01L29/792

CPC classification number: H01L29/78609 ,  H01L29/42328 ,  H01L29/42344 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/792

Abstract: A semiconductor device is provided in the present invention, which includes a substrate, an oxide-semiconductor layer, source/drain regions, a dielectric layer, a first gate electrode, a second gate electrode and a charge storage structure. The oxide-semiconductor layer is disposed on the first gate electrode on the substrate. The source/drain regions are disposed on the oxide-semiconductor layer. The first dielectric layer covers on the oxide-semiconductor layer and source/drain regions. A second gate electrode is disposed between source/drain regions and partially covers the oxide-semiconductor layer. The oxide-semiconductor layer may be optionally disposed between the first gate electrode and the oxide-semiconductor layer or be disposed on the second gate electrode.

公开(公告)号：US20180138316A1

公开(公告)日：2018-05-17

申请号：US15853875

申请日：2017-12-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： ZHIBIAO ZHOU ,  Ding-Lung Chen ,  Chen-Bin Lin ,  SANPO WANG ,  Chung-Yuan Lee ,  Chi-Fa Ku

IPC: H01L29/786 ,  H01L29/792 ,  H01L29/788

CPC classification number: H01L29/78609 ,  H01L29/42328 ,  H01L29/42344 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/792

Abstract: A semiconductor device is provided in the present invention, which includes a substrate, an oxide-semiconductor layer, source/drain regions, a first dielectric layer covering on the oxide-semiconductor layer and the source/drain regions, a second gate between the two source/drain regions and partially covering the oxide-semiconductor layer, and a charge storage structure between the first gate electrode and the oxide-semiconductor layer.