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公开(公告)号:US11637103B2
公开(公告)日:2023-04-25
申请号:US17492687
申请日:2021-10-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L29/66 , H01L29/06 , H01L27/02 , H01L29/78 , H01L29/49 , H01L29/51 , H01L29/423 , H01L29/165 , H01L21/8238 , H01L21/3213 , H01L21/762 , H01L21/02
Abstract: A semiconductor device includes a PMOS region and a NMOS region on a substrate, a first fin-shaped structure on the PMOS region, a first single diffusion break (SDB) structure in the first fin-shaped structure, a first gate structure on the first SDB structure, and a second gate structure on the first fin-shaped structure. Preferably, the first gate structure and the second gate structure are of different materials and the first gate structure disposed directly on top of the first SDB structure is a polysilicon gate while the second gate structure disposed on the first fin-shaped structure is a metal gate in the PMOS region.
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公开(公告)号:US20220181324A1
公开(公告)日:2022-06-09
申请号:US17677983
申请日:2022-02-22
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L21/8238 , H01L29/66 , H01L21/3213 , H01L21/762 , H01L21/02 , H01L29/06 , H01L27/02 , H01L29/78
Abstract: A semiconductor device includes a PMOS region and a NMOS region on a substrate, a first fin-shaped structure on the PMOS region, a first single diffusion break (SDB) structure in the first fin-shaped structure, a first gate structure on the first SDB structure, and a second gate structure on the first fin-shaped structure. Preferably, the first gate structure and the second gate structure are of different materials and the first gate structure disposed directly on top of the first SDB structure is a polysilicon gate while the second gate structure disposed on the first fin-shaped structure is a metal gate in the PMOS region.
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公开(公告)号:US20200035680A1
公开(公告)日:2020-01-30
申请号:US16594054
申请日:2019-10-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L21/8238 , H01L29/78 , H01L29/66 , H01L21/3213 , H01L21/762 , H01L21/02 , H01L29/06 , H01L27/02
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first fin-shaped structure on a substrate; forming a first single diffusion break (SDB) structure in the first fin-shaped structure; forming a first gate structure on the first SDB structure and a second gate structure on the first fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; forming a patterned mask on the first gate structure; and performing a replacement metal gate (RMG) process to transform the second gate structure into a metal gate.
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公开(公告)号:US20220020745A1
公开(公告)日:2022-01-20
申请号:US17492687
申请日:2021-10-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L21/8238 , H01L29/66 , H01L21/3213 , H01L21/762 , H01L21/02 , H01L29/06 , H01L27/02 , H01L29/78
Abstract: A semiconductor device includes a PMOS region and a NMOS region on a substrate, a first fin-shaped structure on the PMOS region, a first single diffusion break (SDB) structure in the first fin-shaped structure, a first gate structure on the first SDB structure, and a second gate structure on the first fin-shaped structure. Preferably, the first gate structure and the second gate structure are of different materials and the first gate structure disposed directly on top of the first SDB structure is a polysilicon gate while the second gate structure disposed on the first fin-shaped structure is a metal gate in the PMOS region.
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公开(公告)号:US10483264B2
公开(公告)日:2019-11-19
申请号:US15660970
申请日:2017-07-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L29/66 , H01L29/06 , H01L29/78 , H01L29/49 , H01L29/51 , H01L29/423 , H01L29/165 , H01L21/8238 , H01L21/3213 , H01L21/762 , H01L21/02 , H01L27/02
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first fin-shaped structure on a substrate; forming a first single diffusion break (SDB) structure in the first fin-shaped structure; forming a first gate structure on the first SDB structure and a second gate structure on the first fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; forming a patterned mask on the first gate structure; and performing a replacement metal gate (RMG) process to transform the second gate structure into a metal gate.
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公开(公告)号:US11699705B2
公开(公告)日:2023-07-11
申请号:US17677983
申请日:2022-02-22
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L29/66 , H01L29/06 , H01L27/02 , H01L29/78 , H01L29/49 , H01L29/51 , H01L29/423 , H01L29/165 , H01L21/8238 , H01L21/3213 , H01L21/762 , H01L21/02
CPC classification number: H01L27/0924 , H01L21/0217 , H01L21/32139 , H01L21/76224 , H01L21/823821 , H01L21/823842 , H01L21/823878 , H01L27/0207 , H01L27/0922 , H01L29/0649 , H01L29/66545 , H01L29/7848 , H01L29/165 , H01L29/42364 , H01L29/42376 , H01L29/4916 , H01L29/4966 , H01L29/517 , H01L29/518
Abstract: A semiconductor device includes a PMOS region and a NMOS region on a substrate, a first fin-shaped structure on the PMOS region, a first single diffusion break (SDB) structure in the first fin-shaped structure, a first gate structure on the first SDB structure, and a second gate structure on the first fin-shaped structure. Preferably, the first gate structure and the second gate structure are of different materials and the first gate structure disposed directly on top of the first SDB structure is a polysilicon gate while the second gate structure disposed on the first fin-shaped structure is a metal gate in the PMOS region.
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公开(公告)号:US11171137B2
公开(公告)日:2021-11-09
申请号:US16594054
申请日:2019-10-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L21/8238 , H01L29/66 , H01L21/3213 , H01L21/762 , H01L21/02 , H01L29/06 , H01L29/78 , H01L29/49 , H01L29/51 , H01L29/423 , H01L29/165 , H01L27/092 , H01L27/02
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first fin-shaped structure on a substrate; forming a first single diffusion break (SDB) structure in the first fin-shaped structure; forming a first gate structure on the first SDB structure and a second gate structure on the first fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; forming a patterned mask on the first gate structure; and performing a replacement metal gate (RMG) process to transform the second gate structure into a metal gate.
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公开(公告)号:US20190006360A1
公开(公告)日:2019-01-03
申请号:US15660970
申请日:2017-07-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Wei Tung , Jen-Yu Wang , Cheng-Tung Huang , Yan-Jou Chen
IPC: H01L27/092 , H01L21/8238 , H01L29/66 , H01L21/3213 , H01L21/762 , H01L21/02 , H01L29/06 , H01L27/02
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first fin-shaped structure on a substrate; forming a first single diffusion break (SDB) structure in the first fin-shaped structure; forming a first gate structure on the first SDB structure and a second gate structure on the first fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; forming a patterned mask on the first gate structure; and performing a replacement metal gate (RMG) process to transform the second gate structure into a metal gate.
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