Pixel driving circuit, and display panel and driving method thereof

    公开(公告)号:US11961477B2

    公开(公告)日:2024-04-16

    申请号:US17197007

    申请日:2021-03-09

    IPC分类号: G09G3/3241

    摘要: A pixel driving circuit, a display panel and a driving method are provided. The pixel driving circuit includes: a first power signal terminal receiving a first voltage signal and a second power signal terminal receiving a second voltage signal; a driving transistor configured to provide a driving current in a light-emitting stage; a light-emitting component, connected in series between the driving transistor and the second power signal terminal and configured to emit light in response to the driving current; a light-emitting controller connected in series between the first power signal terminal and the light-emitting component; and a bias unit, electrically connected between the third node and a second output terminal of a light-emitting control circuit, and in response to a first control signal, configured to transmit a first signal outputted by the light-emitting control circuit to a third node to adjust a bias state of the driving transistor.

    Scanning signal circuit, display panel, display device, and driving method

    公开(公告)号:US11335228B1

    公开(公告)日:2022-05-17

    申请号:US17366339

    申请日:2021-07-02

    IPC分类号: G09G3/20

    摘要: A scanning signal circuit, a display panel and a driving method are provided. In the scanning signal circuit, under an action of an input signal, a first target clock signal, a second target clock signal and a third target clock signal, the input signal and the second target clock signal are transmitted to a potential stabilization module, a first output module and a second output module through an input module and a potential control module; and under a stabilization function of the potential stabilization module that is applied on inputs of the first and second output modules through a high-level signal and a third target clock signal, the first output module is configured to output a first output signal, and the second output module is configured to use a fourth target clock signal to output a second output signal with high-level pulses.

    Display panel, driving method thereof and display device

    公开(公告)号:US11367393B2

    公开(公告)日:2022-06-21

    申请号:US17011944

    申请日:2020-09-03

    IPC分类号: G09G3/3233

    摘要: Provided are a display panel, a driving method thereof and a display device. The display panel includes a substrate, multiple sub-pixels located on one side of the substrate, and at least one signal conversion circuit. Each sub-pixel includes a pixel driving circuit and a light-emitting element. The pixel driving circuit includes an initialization transistor and a driving transistor. A first electrode of the initialization transistor is electrically connected to a gate of the driving transistor. The signal conversion circuit may convert a received initialization signal to a first initialization signal or convert the initialization signal to a second initialization signal according to a received data control signal, and generate an output of the conversion to the second electrode of the initialization transistor. This can avoid an unstable gate voltage of the driving transistor caused by a leakage current, further improve the display effect.

    Driving method of display device and driving device

    公开(公告)号:US11417259B2

    公开(公告)日:2022-08-16

    申请号:US17229876

    申请日:2021-04-14

    IPC分类号: G09G3/20 G09G3/3233

    摘要: Disclosed are a driving method of a display device and a driving device is described. The driving method of a display panel includes that in response to determining that the display device enters a low power consumption state, controlling a light intensity detection component to detect in real time whether the display device is in a strong light environment; in a case where the display device is in the strong light environment, controlling a driver chip to adjust a picture refresh frequency to a first frequency; in a case where the display device is not in the strong light environment, determining a current gray scale of the display device according to a latest user setting instruction, determining an optimal refresh frequency according to the current gray scale and a corresponding relationship between a preset gray scale and the optimal refresh frequency.

    Output control device, output control circuit and display panel

    公开(公告)号:US11410609B2

    公开(公告)日:2022-08-09

    申请号:US16997937

    申请日:2020-08-20

    摘要: Provided is an output control device for providing control signals for a pixel circuit, which includes: a first output device configured to output a first control signal for controlling writing of a data signal into the pixel circuit, a second output device configured to output a second control signal for controlling a light emitting element to emit light, and a third output device configured to output a third control signal for controlling resetting of the light emitting element. A frequency of the third control signal is higher than a frequency of the first control signal. In a first period, the second control signal is an active level signal and the third control signal is an inactive level signal. In a second period, the second control signal is an inactive level signal and the third control signal is an active level signal.

    DISPLAY PANEL, METHOD FOR DRIVING THE SAME, AND DISPLAY DEVICE

    公开(公告)号:US20230298526A1

    公开(公告)日:2023-09-21

    申请号:US18323261

    申请日:2023-05-24

    IPC分类号: G09G3/3233

    摘要: Provided are display panel, method for driving same, and display device. Display panel includes pixel circuit and cascaded first shift circuits. Pixel circuit includes drive transistor and adjusting module electrically connected to first scan line, adjusting line and first electrode of drive transistor. First shift circuit is electrically connected to first scan line and includes first control module and first output module. First control module is electrically connected to first type-A clock line, first shift control line and first control node, and configured to write first shift control signal into first control node in response to first type-A clock signal from first type-A clock line. First output module is electrically connected to first control node, first type-B clock line and first scan line, and configured to write first type-B clock signal into first scan line in response to signal of first control node.