公开(公告)号：US20230317529A1

公开(公告)日：2023-10-05

申请号：US17712052

申请日：2022-04-01

Applicant: XILINX, INC.

Inventor： Yan WANG ,  I-Ru CHEN ,  Nui CHONG ,  Hui-Wen LIN

IPC: H01L21/66 ,  H01L21/78 ,  H01L21/321 ,  H01L23/00 ,  G01R31/28

CPC classification number: H01L22/14 ,  H01L21/78 ,  H01L21/3212 ,  H01L24/80 ,  H01L22/32 ,  G01R31/2884 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: Disclosed herein are integrated circuit (IC) structures and methods for fabricating and testing such IC structures prior to dicing from a semiconductor wafer on which the IC structures are formed. In one example, a method for fabricating an IC structure includes contacting a first plurality of test pads of the IC structure with one or more test probes. The first plurality of test pads are disposed within or on a first dielectric layer within a scribe lane, i.e., a test region. A first metal layer is formed over the first plurality of test pads if a predefined test criteria is met as determined using information obtained through first plurality of test pads using the one or more test probes. The first metal layer is a layer formed in a die region of an IC die that is being fabricated in the wafer.