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公开(公告)号:US20170207194A1
公开(公告)日:2017-07-20
申请号:US15409511
申请日:2017-01-18
Applicant: XINTEC INC.
Inventor: Hsing-Lung SHEN , Jiun-Yen LAI , Yu-Ting HUANG , Tsung-Cheng CHAN , Jan-Lian LIAO , Hung-Chang CHEN , Ming-Chieh HUANG , Hsi-Chien LIN
CPC classification number: H01L24/03 , H01L21/563 , H01L23/295 , H01L23/3128 , H01L23/3135 , H01L23/3171 , H01L23/3178 , H01L24/06 , H01L24/13 , H01L24/24 , H01L24/82 , H01L24/94 , H01L25/50 , H01L2224/02373 , H01L2224/13022 , H01L2224/13024 , H01L2224/24145 , H01L2224/82005 , H01L2224/94 , H01L2924/10253 , H01L2924/1433 , H01L2924/3511 , H01L2924/3512 , H01L2224/82
Abstract: A chip package is provided. The chip package includes a first chip including a carrier substrate and a device substrate thereon. A second chip is mounted on the device substrate. A portion of the device substrate extends outward from the edge of the second chip, so as to be exposed from the second chip. A conductive pad is between the device substrate and the second chip. A polymer protective layer conformally covers the second chip, the exposed portion of the device substrate, and the edge of the carrier substrate. A redistribution layer is disposed on the polymer protective layer and extends into a first opening that passes through the polymer protective layer and the second chip and exposes the conductive pad, so as to be electrically connected to the conductive pad.