公开(公告)号：US11281834B1

公开(公告)日：2022-03-22

申请号：US16531346

申请日：2019-08-05

Applicant: Xilinx, Inc.

Inventor： Rajvinder S. Klair ,  Alec J. Wong ,  Sahil Goyal ,  Amit Kasat ,  Brian Cotter ,  Herve Alexanian

IPC: G06F30/36 ,  G06F30/367 ,  G06F8/41 ,  G06F8/70 ,  G06F21/60 ,  G06F9/445 ,  G06F8/54

Abstract: Approaches for protection of HLL simulation models in a circuit design having unprotected high-level language (HLL) program code and first metadata of a shared library of executable simulation models that are based on sensitive HLL simulation models. A design tool determines a first storage location of the shared library based on the first metadata and compiles the unprotected HLL program code into an executable object. The design tool links the executable object with the library of executable simulation models from the first storage location and then simulates the circuit design by executing the executable object and loading the executable simulation models in response to initiation by the executable object.

公开(公告)号：US08914762B1

公开(公告)日：2014-12-16

申请号：US13951135

申请日：2013-07-25

Applicant: Xilinx, Inc.

Inventor： Martin Sinclair ,  Brian Cotter

IPC: G06F17/50

CPC classification number: G06F17/505

Abstract: A method, computer-readable medium and apparatus for creating a platform-specific logic design from an input design are disclosed. For example, a method includes receiving an input design and an identification of a target device. The method next determines an unconnected external interface of the input design and detects an unconnected external interface of the target device. The method then generates an updated design from the input design. The updated design includes the input design and further includes a connection between the unconnected external interface of the input design and the unconnected external interface of the target device.

Abstract translation: 公开了一种用于从输入设计创建与平台相关的逻辑设计的方法，计算机可读介质和装置。 例如，一种方法包括接收目标设备的输入设计和标识。 该方法接下来确定输入设计的未连接的外部接口，并检测目标设备的未连接的外部接口。 该方法然后从输入设计生成更新的设计。 更新的设计包括输入设计，还包括输入设计的未连接的外部接口与目标设备的未连接的外部接口之间的连接。