公开(公告)号：US20130285215A1

公开(公告)日：2013-10-31

申请号：US13845728

申请日：2013-03-18

Applicant: XINTEC INC.

Inventor： Yu-Lin Yen ,  Hsi-Chien Lin ,  Yeh-Shih Ho

IPC: H01L23/00 ,  H01L21/50

CPC classification number: H01L23/562 ,  B81C1/00269 ,  B81C1/00357 ,  B81C3/001 ,  B81C2201/019 ,  H01L21/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A stacked wafer structure includes a substrate; dams provided on the substrate and having protrusions on a surface thereof; and a wafer with recesses provided on the dam. The protrusions on the surface of the dams are wedged into the recesses of the wafer, preventing air chambers from forming between the recesses of the wafer and the dams, so that the wafer is not separated from the dams due to the presence of air chambers during subsequent packaging process. A method for stacking a wafer is also provided.

Abstract translation: 堆叠晶片结构包括基板; 堤坝设置在基板上并在其表面上具有突起; 以及设置在坝上的具有凹槽的晶片。 坝的表面上的突起楔入晶片的凹槽中，防止在晶片的凹槽和坝之间形成空气室，使得晶片由于存在气室而不与坝隔离 随后的包装过程。 还提供了一种堆叠晶片的方法。

公开(公告)号：US09196589B2

公开(公告)日：2015-11-24

申请号：US13845728

申请日：2013-03-18

Applicant: Xintec Inc.

Inventor： Yu-Lin Yen ,  Hsi-Chien Lin ,  Yeh-Shih Ho

IPC: H01L29/06 ,  H01L23/00 ,  H01L21/50 ,  B81C1/00 ,  B81C3/00

CPC classification number: H01L23/562 ,  B81C1/00269 ,  B81C1/00357 ,  B81C3/001 ,  B81C2201/019 ,  H01L21/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A stacked wafer structure includes a substrate; dams provided on the substrate and having protrusions on a surface thereof; and a wafer with recesses provided on the dam. The protrusions on the surface of the dams are wedged into the recesses of the wafer, preventing air chambers from forming between the recesses of the wafer and the dams, so that the wafer is not separated from the dams due to the presence of air chambers during subsequent packaging process. A method for stacking a wafer is also provided.

Abstract translation: 堆叠晶片结构包括基板; 堤坝设置在基板上并在其表面上具有突起; 以及设置在坝上的具有凹槽的晶片。 坝的表面上的突起楔入晶片的凹槽中，防止在晶片的凹槽和坝之间形成空气室，使得晶片由于存在气室而不与坝隔离 随后的包装过程。 还提供了一种堆叠晶片的方法。

公开(公告)号：US20130168868A1

公开(公告)日：2013-07-04

申请号：US13727976

申请日：2012-12-27

Applicant: Xintec Inc.

Inventor： Yeh-Shih Ho ,  Hsin Kuan ,  Long-Sheng Yeou ,  Tsang-Yu Liu ,  Chia-Ming Cheng

IPC: H01L21/82 ,  H01L23/14

CPC classification number: H01L21/82 ,  B81B7/007 ,  B81B2207/096 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/14 ,  H01L23/147 ,  H01L24/08 ,  H01L24/24 ,  H01L24/80 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24146 ,  H01L2224/80006 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/1461 ,  H01L2224/82 ,  H01L2224/80 ,  H01L21/78

Abstract: A fabrication method of a semiconductor stack structure mainly includes: singulating a wafer of a first specification into a plurality of chips; rearranging the chips into a second specification of a wafer so as to stack the chips on a substrate of the second specification through a plurality of blocks; forming a redistribution layer on the chips; and performing a cutting process to obtain a plurality of semiconductor stack structures. Therefore, the present invention allows a wafer of a new specification to be processed by using conventional equipment without the need of new factory buildings or equipment. As such, chip packages can be timely supplied to meet the replacement speed of electronic products.

Abstract translation: 半导体堆叠结构的制造方法主要包括：将第一规格的晶片分割成多个芯片; 将芯片重新排列成晶片的第二规格，以通过多个块将芯片堆叠在第二规格的基板上; 在芯片上形成再分配层; 并执行切割处理以获得多个半导体堆叠结构。 因此，本发明允许通过使用常规设备来处理新规格的晶片，而不需要新的工厂建筑物或设备。 因此，可以及时提供芯片封装以满足电子产品的更换速度。